From: Mayuresh Chitale <mchitale@ventanamicro.com>
To: opensbi@lists.infradead.org
Subject: [RFC PATCH v1 0/3] RISC-V Smstateen support
Date: Mon, 21 Mar 2022 10:45:25 +0530 [thread overview]
Message-ID: <20220321051528.20143-1-mchitale@ventanamicro.com> (raw)
This series adds support for the Smstateen specification which provides
a mechanism to plug potential covert channels which are opened by extensions
which add to processor state that may not get context-switched. Currently
access to AIA registers and *envcfg registers is controlled via
smstateen.
Mayuresh Chitale (3):
lib: sbi: Add Smstateen extension defines
lib: sbi: Detect Smstateen CSRs at boot-time
lib: sbi: configure mstateen
include/sbi/riscv_encoding.h | 37 ++++++++++++++++++++++++++++++++++++
include/sbi/sbi_hart.h | 4 +++-
lib/sbi/sbi_hart.c | 29 +++++++++++++++++++++++++++-
3 files changed, 68 insertions(+), 2 deletions(-)
--
2.17.1
next reply other threads:[~2022-03-21 5:15 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-21 5:15 Mayuresh Chitale [this message]
2022-03-21 5:15 ` [RFC PATCH v1 1/3] lib: sbi: Add Smstateen extension defines Mayuresh Chitale
2022-04-05 3:29 ` Anup Patel
2022-03-21 5:15 ` [RFC PATCH v1 2/3] lib: sbi: Detect Smstateen CSRs at boot-time Mayuresh Chitale
2022-04-05 3:31 ` Anup Patel
2022-03-21 5:15 ` [RFC PATCH v1 3/3] lib: sbi: configure mstateen Mayuresh Chitale
2022-04-05 3:32 ` Anup Patel
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