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From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
	atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
	hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
	behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
	allen.baum@esperantotech.com, jscheid@ventanamicro.com,
	rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
	philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>,
	Atish Patra <atishp@rivosinc.com>
Subject: [PATCH v8 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i
Date: Thu, 24 Mar 2022 01:06:57 +0100	[thread overview]
Message-ID: <20220324000710.575331-2-heiko@sntech.de> (raw)
In-Reply-To: <20220324000710.575331-1-heiko@sntech.de>

The callback used inside sbi_remote_fence_i is set at sbi probe time
to the needed variant. Before that it is a NULL pointer.

Some users like the flush_icache_*() functions suggest a generic
functionality, that doesn't depend on a specific boot-stage but
uses sbi_remote_fence_i as one option to flush other cpu cores.

So they definitely shouldn't run into null-pointer dereference
issues when called "too early" during boot.

So introduce an empty function to be the standard for the __sbi_rfence
function pointer until sbi_init has run.

Users of sbi_remote_fence_i will have separate code for the local
cpu and sbi_init() is called before other cpus are brought up.
So there are no other cpus present at the time when the issue
might happen.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/kernel/sbi.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 775d3322b422..5a60a458c0b7 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -16,11 +16,19 @@
 unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT;
 EXPORT_SYMBOL(sbi_spec_version);
 
+static int __sbi_rfence_none(int fid, const struct cpumask *cpu_mask,
+			     unsigned long start, unsigned long size,
+			     unsigned long arg4, unsigned long arg5)
+{
+	return -EOPNOTSUPP;
+}
+
 static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init;
 static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init;
 static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask,
 			   unsigned long start, unsigned long size,
-			   unsigned long arg4, unsigned long arg5) __ro_after_init;
+			   unsigned long arg4, unsigned long arg5)
+			   __ro_after_init = __sbi_rfence_none;
 
 struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
 			unsigned long arg1, unsigned long arg2,
-- 
2.35.1


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WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: palmer@dabbelt.com, paul.walmsley@sifive.com, aou@eecs.berkeley.edu
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	wefu@redhat.com, liush@allwinnertech.com, guoren@kernel.org,
	atishp@atishpatra.org, anup@brainfault.org, drew@beagleboard.org,
	hch@lst.de, arnd@arndb.de, wens@csie.org, maxime@cerno.tech,
	gfavor@ventanamicro.com, andrea.mondelli@huawei.com,
	behrensj@mit.edu, xinhaoqu@huawei.com, mick@ics.forth.gr,
	allen.baum@esperantotech.com, jscheid@ventanamicro.com,
	rtrauben@gmail.com, samuel@sholland.org, cmuellner@linux.com,
	philipp.tomsich@vrull.eu, Heiko Stuebner <heiko@sntech.de>,
	Atish Patra <atishp@rivosinc.com>
Subject: [PATCH v8 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i
Date: Thu, 24 Mar 2022 01:06:57 +0100	[thread overview]
Message-ID: <20220324000710.575331-2-heiko@sntech.de> (raw)
In-Reply-To: <20220324000710.575331-1-heiko@sntech.de>

The callback used inside sbi_remote_fence_i is set at sbi probe time
to the needed variant. Before that it is a NULL pointer.

Some users like the flush_icache_*() functions suggest a generic
functionality, that doesn't depend on a specific boot-stage but
uses sbi_remote_fence_i as one option to flush other cpu cores.

So they definitely shouldn't run into null-pointer dereference
issues when called "too early" during boot.

So introduce an empty function to be the standard for the __sbi_rfence
function pointer until sbi_init has run.

Users of sbi_remote_fence_i will have separate code for the local
cpu and sbi_init() is called before other cpus are brought up.
So there are no other cpus present at the time when the issue
might happen.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/kernel/sbi.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/riscv/kernel/sbi.c b/arch/riscv/kernel/sbi.c
index 775d3322b422..5a60a458c0b7 100644
--- a/arch/riscv/kernel/sbi.c
+++ b/arch/riscv/kernel/sbi.c
@@ -16,11 +16,19 @@
 unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT;
 EXPORT_SYMBOL(sbi_spec_version);
 
+static int __sbi_rfence_none(int fid, const struct cpumask *cpu_mask,
+			     unsigned long start, unsigned long size,
+			     unsigned long arg4, unsigned long arg5)
+{
+	return -EOPNOTSUPP;
+}
+
 static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init;
 static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init;
 static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask,
 			   unsigned long start, unsigned long size,
-			   unsigned long arg4, unsigned long arg5) __ro_after_init;
+			   unsigned long arg4, unsigned long arg5)
+			   __ro_after_init = __sbi_rfence_none;
 
 struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
 			unsigned long arg1, unsigned long arg2,
-- 
2.35.1


  reply	other threads:[~2022-03-24  0:08 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-24  0:06 [PATCH v8 00/14] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-03-24  0:06 ` Heiko Stuebner
2022-03-24  0:06 ` Heiko Stuebner [this message]
2022-03-24  0:06   ` [PATCH v8 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i Heiko Stuebner
2022-03-31  9:51   ` Christoph Hellwig
2022-03-31  9:51     ` Christoph Hellwig
2022-03-31 12:28     ` Heiko Stübner
2022-03-31 12:28       ` Heiko Stübner
2022-03-31 12:33       ` Christoph Hellwig
2022-03-31 12:33         ` Christoph Hellwig
2022-04-07 18:50         ` Heiko Stübner
2022-04-07 18:50           ` Heiko Stübner
2022-03-24  0:06 ` [PATCH v8 02/14] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-03-24  0:06   ` Heiko Stuebner
2022-03-31  9:53   ` Christoph Hellwig
2022-03-31  9:53     ` Christoph Hellwig
2022-03-24  0:06 ` [PATCH v8 03/14] riscv: allow different stages with alternatives Heiko Stuebner
2022-03-24  0:06   ` Heiko Stuebner
2022-03-24  0:07 ` [PATCH v8 04/14] riscv: implement module alternatives Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-24  0:07 ` [PATCH v8 05/14] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31  9:56   ` Christoph Hellwig
2022-03-31  9:56     ` Christoph Hellwig
2022-03-24  0:07 ` [PATCH v8 06/14] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-24  0:07 ` [PATCH v8 07/14] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31  9:56   ` Christoph Hellwig
2022-03-31  9:56     ` Christoph Hellwig
2022-03-24  0:07 ` [PATCH v8 08/14] riscv: move boot alternatives to after fill_hwcap Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31  9:57   ` Christoph Hellwig
2022-03-31  9:57     ` Christoph Hellwig
2022-03-24  0:07 ` [PATCH v8 09/14] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31  9:59   ` Christoph Hellwig
2022-03-31  9:59     ` Christoph Hellwig
2022-03-24  0:07 ` [PATCH v8 10/14] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31 10:01   ` Christoph Hellwig
2022-03-31 10:01     ` Christoph Hellwig
2022-04-08 16:13     ` Heiko Stübner
2022-04-08 16:13       ` Heiko Stübner
2022-03-24  0:07 ` [PATCH v8 11/14] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31 10:03   ` Christoph Hellwig
2022-03-31 10:03     ` Christoph Hellwig
2022-03-31 12:19     ` Heiko Stübner
2022-03-31 12:19       ` Heiko Stübner
2022-03-31 12:27       ` Christoph Hellwig
2022-03-31 12:27         ` Christoph Hellwig
2022-03-31 12:29   ` Christoph Hellwig
2022-03-31 12:29     ` Christoph Hellwig
2022-03-24  0:07 ` [PATCH v8 12/14] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31 10:03   ` Christoph Hellwig
2022-03-31 10:03     ` Christoph Hellwig
2022-03-24  0:07 ` [PATCH v8 13/14] riscv: don't use global static vars to store alternative data Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-24  0:07 ` [PATCH v8 14/14] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-03-24  0:07   ` Heiko Stuebner
2022-03-31  2:24 ` [PATCH v8 00/14] riscv: support for Svpbmt and D1 memory types Palmer Dabbelt
2022-03-31  2:24   ` Palmer Dabbelt

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