From: Jakub Kicinski <kuba@kernel.org>
To: Andy Chiu <andy.chiu@sifive.com>
Cc: radhey.shyam.pandey@xilinx.com, robert.hancock@calian.com,
michal.simek@xilinx.com, andrew@lunn.ch, davem@davemloft.net,
pabeni@redhat.com, robh+dt@kernel.org, linux@armlinux.org.uk,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
robh@kernel.org
Subject: Re: [PATCH v6 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode
Date: Mon, 28 Mar 2022 16:58:39 -0700 [thread overview]
Message-ID: <20220328165839.70f964dc@kernel.org> (raw)
In-Reply-To: <20220328123238.2569322-1-andy.chiu@sifive.com>
On Mon, 28 Mar 2022 20:32:34 +0800 Andy Chiu wrote:
> The Ethernet driver use phy-handle to reference the PCS/PMA PHY. This
> could be a problem if one wants to configure an external PHY via phylink,
> since it use the same phandle to get the PHY. To fix this, introduce a
> dedicated pcs-handle to point to the PCS/PMA PHY and deprecate the use
> of pointing it with phy-handle. A similar use case of pcs-handle can be
> seen on dpaa2 as well.
>
> --- patch v5 ---
> - Re-applying the v4 patch on the net tree.
> - Describes the pcs-handle DT binding at ethernet-controller level.
> --- patch v6 ---
> - Remove "preferrably" to clearify usage of pcs_handle.
This set not longer applies, please rebase on latest net/master.
next prev parent reply other threads:[~2022-03-28 23:58 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-28 12:32 [PATCH v6 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-28 12:32 ` [PATCH v6 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-03-28 12:32 ` [PATCH v6 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
2022-03-28 12:32 ` [PATCH v6 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
2022-03-28 12:32 ` [PATCH v6 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
2022-03-28 23:58 ` Jakub Kicinski [this message]
2022-03-29 2:49 ` [PATCH v6 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
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