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From: Anup Patel <apatel@ventanamicro.com>
To: opensbi@lists.infradead.org
Subject: [PATCH 3/4] lib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR
Date: Tue, 29 Mar 2022 21:22:17 +0530	[thread overview]
Message-ID: <20220329155218.118580-4-apatel@ventanamicro.com> (raw)
In-Reply-To: <20220329155218.118580-1-apatel@ventanamicro.com>

The bits to configure/enable Zicbo[m|z] extensions in the menvcfg
CSR are WARL. We try to enable these bits irrespective whether
these extensions are available or not because writes to these
bits will be ignored if these extensions are not available.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 lib/sbi/sbi_hart.c | 33 ++++++++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/lib/sbi/sbi_hart.c b/lib/sbi/sbi_hart.c
index 31c8f39..d2c7aba 100644
--- a/lib/sbi/sbi_hart.c
+++ b/lib/sbi/sbi_hart.c
@@ -39,7 +39,7 @@ static unsigned long hart_features_offset;
 
 static void mstatus_init(struct sbi_scratch *scratch)
 {
-	unsigned long mstatus_val = 0;
+	unsigned long menvcfg_val, mstatus_val = 0;
 	int cidx;
 	unsigned int num_mhpm = sbi_hart_mhpm_count(scratch);
 	uint64_t mhpmevent_init_val = 0;
@@ -86,6 +86,37 @@ static void mstatus_init(struct sbi_scratch *scratch)
 		csr_write_num(CSR_MHPMEVENT3 + cidx, mhpmevent_init_val);
 #endif
 	}
+
+	if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MENVCFG)) {
+		menvcfg_val = csr_read(CSR_MENVCFG);
+
+		/*
+		 * Set menvcfg.CBZE == 1
+		 *
+		 * If Zicboz extension is not available then writes to
+		 * menvcfg.CBZE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_CBZE;
+
+		/*
+		 * Set menvcfg.CBCFE == 1
+		 *
+		 * If Zicbom extension is not available then writes to
+		 * menvcfg.CBCFE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_CBCFE;
+
+		/*
+		 * Set menvcfg.CBIE == 3
+		 *
+		 * If Zicbom extension is not available then writes to
+		 * menvcfg.CBIE will be ignored because it is a WARL field.
+		 */
+		menvcfg_val |= ENVCFG_CBIE_INV << ENVCFG_CBIE_SHIFT;
+
+		csr_write(CSR_MENVCFG, menvcfg_val);
+	}
+
 	/* Disable all interrupts */
 	csr_write(CSR_MIE, 0);
 
-- 
2.25.1



  parent reply	other threads:[~2022-03-29 15:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-29 15:52 [PATCH 0/4] Configure Zicbo[m|z] and Svpbmt in menvcfg CSR Anup Patel
2022-03-29 15:52 ` [PATCH 1/4] include: Add defines for [m|h|s]envcfg CSRs Anup Patel
2022-03-29 23:48   ` Atish Patra
2022-03-30 14:47   ` Xiang W
2022-04-05  3:27   ` Anup Patel
2022-03-29 15:52 ` [PATCH 2/4] lib: sbi: Detect menvcfg CSR at boot time Anup Patel
2022-03-30 14:48   ` Xiang W
2022-04-05  3:27   ` Anup Patel
2022-03-29 15:52 ` Anup Patel [this message]
2022-03-30  0:04   ` [PATCH 3/4] lib: sbi: Enable Zicbo[m|z] extensions in the menvcfg CSR Atish Patra
2022-03-30 14:49   ` Xiang W
2022-04-05  3:27   ` Anup Patel
2022-03-29 15:52 ` [PATCH 4/4] lib: sbi: Enable Svpbmt extension " Anup Patel
2022-03-30  0:04   ` Atish Patra
2022-03-30 14:49   ` Xiang W
2022-04-05  3:28   ` Anup Patel

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