All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Michael S. Tsirkin" <mst@redhat.com>
To: Frederic Barrat <fbarrat@linux.ibm.com>
Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, clg@kaod.org,
	qemu-devel@nongnu.org
Subject: Re: [PATCH 0/2] Remove PCIE root bridge LSI on powernv
Date: Wed, 6 Apr 2022 03:52:27 -0400	[thread overview]
Message-ID: <20220406035156-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20220321153357.165775-1-fbarrat@linux.ibm.com>

On Mon, Mar 21, 2022 at 04:33:55PM +0100, Frederic Barrat wrote:
> The powernv8/powernv9/powernv10 machines allocate a LSI for their root
> port bridge, which is not the case on real hardware. The default root
> port implementation in qemu requests a LSI. Since the powernv
> implementation derives from it, that's where the LSI is coming
> from. This series fixes it, so that the model matches the hardware.
> 
> However, the code in hw/pci to handle AER and hotplug events assume a
> LSI is defined. It tends to assert/deassert a LSI if MSI or MSIX is
> not enabled. Since we have hardware where that is not true, this patch
> also fixes a few code paths to check if a LSI is configured before
> trying to trigger it.


Hi Frederic, thanks for the patch!
I assume you will address Daniel's comments and post a new version,
right?

> 
> Frederic Barrat (2):
>   pcie: Don't try triggering a LSI when not defined
>   ppc/pnv: Remove LSI on the PCIE host bridge
> 
>  hw/pci-host/pnv_phb3.c | 1 +
>  hw/pci-host/pnv_phb4.c | 1 +
>  hw/pci/pcie.c          | 8 ++++++--
>  hw/pci/pcie_aer.c      | 4 +++-
>  4 files changed, 11 insertions(+), 3 deletions(-)
> 
> -- 
> 2.35.1



  parent reply	other threads:[~2022-04-06  7:55 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-21 15:33 [PATCH 0/2] Remove PCIE root bridge LSI on powernv Frederic Barrat
2022-03-21 15:33 ` [PATCH 1/2] pcie: Don't try triggering a LSI when not defined Frederic Barrat
2022-03-24 13:07   ` Daniel Henrique Barboza
2022-03-24 13:47     ` Frederic Barrat
2022-03-24 14:02       ` Daniel Henrique Barboza
2022-03-21 15:33 ` [PATCH 2/2] ppc/pnv: Remove LSI on the PCIE host bridge Frederic Barrat
2022-03-24 13:10   ` Daniel Henrique Barboza
2022-04-06  7:52 ` Michael S. Tsirkin [this message]
2022-04-06  8:57   ` [PATCH 0/2] Remove PCIE root bridge LSI on powernv Frederic Barrat

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220406035156-mutt-send-email-mst@kernel.org \
    --to=mst@redhat.com \
    --cc=clg@kaod.org \
    --cc=danielhb413@gmail.com \
    --cc=fbarrat@linux.ibm.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.