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From: "Pali Rohár" <pali@kernel.org>
To: Priyanka Jain <priyanka.jain@nxp.com>,
	Qiang Zhao <qiang.zhao@nxp.com>,
	Shengzhou Liu <Shengzhou.Liu@nxp.com>,
	Sinan Akman <sinan@writeme.com>
Cc: u-boot@lists.denx.de
Subject: [PATCH 09/11] board: freescale: p1_p2_rdb_pc: Define SW macros for lower and upper NOR banks
Date: Thu,  7 Apr 2022 12:16:22 +0200	[thread overview]
Message-ID: <20220407101624.15850-10-pali@kernel.org> (raw)
In-Reply-To: <20220407101624.15850-1-pali@kernel.org>

Replace hardcoded i2c hex values for NOR banks by named SW macros in
map_lowernorbank/map_uppernorbank env commands.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 include/configs/p1_p2_rdb_pc.h | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index cb3b1a1da05d..995bd983cef1 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -22,6 +22,9 @@
 #define __SW_BOOT_SD		0x9c
 #define __SW_BOOT_NAND		0xec
 #define __SW_BOOT_PCIE		0x6c
+#define __SW_NOR_BANK_MASK	0xfd
+#define __SW_NOR_BANK_UP	0x00
+#define __SW_NOR_BANK_LO	0x02
 #define CONFIG_SYS_L2_SIZE	(256 << 10)
 #endif
 
@@ -48,6 +51,9 @@
 #define __SW_BOOT_SD		0x24
 #define __SW_BOOT_NAND		0x44
 #define __SW_BOOT_PCIE		0x74
+#define __SW_NOR_BANK_MASK	0xfd
+#define __SW_NOR_BANK_UP	0x00
+#define __SW_NOR_BANK_LO	0x02
 #define CONFIG_SYS_L2_SIZE	(256 << 10)
 /*
  * Dynamic MTD Partition support with mtdparts
@@ -64,6 +70,9 @@
 #define __SW_BOOT_SD2		0x18
 #define __SW_BOOT_NAND		0xe8
 #define __SW_BOOT_PCIE		0xa8
+#define __SW_NOR_BANK_MASK	0xfd
+#define __SW_NOR_BANK_UP	0x00
+#define __SW_NOR_BANK_LO	0x02
 #define CONFIG_SYS_L2_SIZE	(512 << 10)
 /*
  * Dynamic MTD Partition support with mtdparts
@@ -617,8 +626,8 @@ i2c mw CONFIG_SYS_I2C_PCA9557_ADDR 3 __SW_BOOT_MASK 1; reset
 "nandfdtaddr=80000\0"		\
 "ramdisk_size=120000\0"	\
 __VSCFW_ADDR	\
-"map_lowernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 02 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
-"map_uppernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 00 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 fd 1\0" \
+"map_lowernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 "__stringify(__SW_NOR_BANK_LO)" 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 "__stringify(__SW_NOR_BANK_MASK)" 1\0" \
+"map_uppernorbank=i2c dev "__stringify(CONFIG_SYS_SPD_BUS_NUM)"; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 1 "__stringify(__SW_NOR_BANK_UP)" 1; i2c mw "__stringify(CONFIG_SYS_I2C_PCA9557_ADDR)" 3 "__stringify(__SW_NOR_BANK_MASK)" 1\0" \
 __stringify(__NOR_RST_CMD)"\0" \
 __stringify(__SPI_RST_CMD)"\0" \
 __stringify(__SD_RST_CMD)"\0" \
-- 
2.20.1


  parent reply	other threads:[~2022-04-07 10:19 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-07 10:16 [PATCH 00/11] board: freescale: p1_p2_rdb_pc: Various cleanups and fixes Pali Rohár
2022-04-07 10:16 ` [PATCH 01/11] board: freescale: p1_p2_rdb_pc: Do not hang in checkboard() Pali Rohár
2022-04-07 10:16 ` [PATCH 02/11] board: freescale: p1_p2_rdb_pc: Detect both P2020 SD switch configurations Pali Rohár
2022-04-07 10:16 ` [PATCH 03/11] board: freescale: p1_p2_rdb_pc: Fix parsing negated upper 4 bits from boot input data Pali Rohár
2022-04-25 14:12   ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Fix parsing inverted " Pali Rohár
2022-06-16  9:00     ` Peng Fan (OSS)
2022-06-16 12:37       ` [PATCH v3] " Pali Rohár
2022-06-23 13:04         ` Pali Rohár
2022-07-03 12:39           ` Pali Rohár
2022-07-08 22:49             ` Pali Rohár
2022-07-08 23:10               ` Tom Rini
2022-07-23  9:48                 ` Pali Rohár
2022-04-07 10:16 ` [PATCH 04/11] board: freescale: p1_p2_rdb_pc: Do not set MPC85xx_PMUXCR_SDHC_WP bit when SDHC_WP is used as GPIO Pali Rohár
2022-04-07 10:16 ` [PATCH 05/11] board: freescale: p1_p2_rdb_pc: Fix page attributes for second 1G SDRAM map Pali Rohár
2022-04-07 10:16 ` [PATCH 06/11] board: freescale: p1_p2_rdb_pc: Move ifdef for USB/eLBC check to correct place Pali Rohár
2022-04-07 10:16 ` [PATCH 07/11] board: freescale: p1_p2_rdb_pc: Fix env $vscfw_addr Pali Rohár
2022-04-07 10:16 ` [PATCH 08/11] board: freescale: p1_p2_rdb_pc: Use named macros for i2c bus num and address Pali Rohár
2022-04-07 10:16 ` Pali Rohár [this message]
2022-04-07 10:16 ` [PATCH 10/11] board: freescale: p1_p2_rdb_pc: Move BootROM change source macros to p1_p2_bootrom.h Pali Rohár
2022-04-25 14:48   ` [PATCH v2] board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.h Pali Rohár
2022-05-26  6:08     ` Priyanka Jain (OSS)
2022-05-26  8:32       ` Pali Rohár
2022-05-26  8:52         ` [PATCH v3] " Pali Rohár
2022-06-02 22:02           ` Pali Rohár
2022-04-07 10:16 ` [PATCH 11/11] board: freescale: p1_p2_rdb_pc: Add env commands norlowerboot, norupperboot, sd2boot and defboot Pali Rohár
2022-04-25 14:50   ` [PATCH v2] " Pali Rohár
2022-06-16  9:01     ` Peng Fan (OSS)
2022-06-23 13:43       ` Pali Rohár
2022-07-03 12:38         ` Pali Rohár
     [not found]           ` <20220708224344.jswbjxp3tdnfnmlp@pali>
2022-07-08 23:12             ` Tom Rini
2022-07-21 22:20               ` Pali Rohár
2022-08-01 13:01                 ` Pali Rohár

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