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From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Kees Cook <keescook@chromium.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v3 27/30] arm64: head: clean the ID map page to the PoC
Date: Mon, 11 Apr 2022 11:48:21 +0200	[thread overview]
Message-ID: <20220411094824.4176877-28-ardb@kernel.org> (raw)
In-Reply-To: <20220411094824.4176877-1-ardb@kernel.org>

If we enter with the MMU and caches enabled, the caller may not have
performed any cache maintenance. So clean the ID mapped page to the PoC,
and invalidate the I-cache so we can safely execute from it after
disabling the MMU and caches.

Note that this means primary_entry() itself needs to be moved into the
ID map as well, as we will return from init_kernel_el() with the MMU and
caches off.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/head.S | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4a05f4480207..0987d59ae333 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -75,7 +75,7 @@
 
 	__EFI_PE_HEADER
 
-	__INIT
+	.section ".idmap.text","awx"
 
 	/*
 	 * The following callee saved general purpose registers are used on the
@@ -93,6 +93,18 @@ SYM_CODE_START(primary_entry)
 	bl	record_mmu_state
 	bl	preserve_boot_args
 	bl	create_idmap
+
+	/*
+	 * If we entered with the MMU and caches on, clean the ID mapped part
+	 * of the primary boot code to the PoC and invalidate it from the
+	 * I-cache so we can safely turn them off.
+	 */
+	cbz	x22, 0f
+	adrp	x0, __idmap_text_start
+	adr_l	x1, __idmap_text_end
+	bl	dcache_clean_poc
+	ic	ialluis
+0:
 	bl	init_kernel_el			// w0=cpu_boot_mode
 	mov	x20, x0
 
@@ -106,6 +118,7 @@ SYM_CODE_START(primary_entry)
 	b	__primary_switch
 SYM_CODE_END(primary_entry)
 
+	__INIT
 SYM_CODE_START_LOCAL(record_mmu_state)
 	mrs	x22, CurrentEL
 	cmp	x22, #CurrentEL_EL2
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Ard Biesheuvel <ardb@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>,
	Marc Zyngier <maz@kernel.org>, Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Kees Cook <keescook@chromium.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Brown <broonie@kernel.org>
Subject: [PATCH v3 27/30] arm64: head: clean the ID map page to the PoC
Date: Mon, 11 Apr 2022 11:48:21 +0200	[thread overview]
Message-ID: <20220411094824.4176877-28-ardb@kernel.org> (raw)
In-Reply-To: <20220411094824.4176877-1-ardb@kernel.org>

If we enter with the MMU and caches enabled, the caller may not have
performed any cache maintenance. So clean the ID mapped page to the PoC,
and invalidate the I-cache so we can safely execute from it after
disabling the MMU and caches.

Note that this means primary_entry() itself needs to be moved into the
ID map as well, as we will return from init_kernel_el() with the MMU and
caches off.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm64/kernel/head.S | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4a05f4480207..0987d59ae333 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -75,7 +75,7 @@
 
 	__EFI_PE_HEADER
 
-	__INIT
+	.section ".idmap.text","awx"
 
 	/*
 	 * The following callee saved general purpose registers are used on the
@@ -93,6 +93,18 @@ SYM_CODE_START(primary_entry)
 	bl	record_mmu_state
 	bl	preserve_boot_args
 	bl	create_idmap
+
+	/*
+	 * If we entered with the MMU and caches on, clean the ID mapped part
+	 * of the primary boot code to the PoC and invalidate it from the
+	 * I-cache so we can safely turn them off.
+	 */
+	cbz	x22, 0f
+	adrp	x0, __idmap_text_start
+	adr_l	x1, __idmap_text_end
+	bl	dcache_clean_poc
+	ic	ialluis
+0:
 	bl	init_kernel_el			// w0=cpu_boot_mode
 	mov	x20, x0
 
@@ -106,6 +118,7 @@ SYM_CODE_START(primary_entry)
 	b	__primary_switch
 SYM_CODE_END(primary_entry)
 
+	__INIT
 SYM_CODE_START_LOCAL(record_mmu_state)
 	mrs	x22, CurrentEL
 	cmp	x22, #CurrentEL_EL2
-- 
2.30.2


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  parent reply	other threads:[~2022-04-11  9:51 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-11  9:47 [PATCH v3 00/30] arm64: support WXN and entry with MMU enabled Ard Biesheuvel
2022-04-11  9:47 ` Ard Biesheuvel
2022-04-11  9:47 ` [PATCH v3 01/30] arm64: head: move kimage_vaddr variable into C file Ard Biesheuvel
2022-04-11  9:47   ` Ard Biesheuvel
2022-04-11  9:47 ` [PATCH v3 02/30] arm64: mm: make vabits_actual a build time constant if possible Ard Biesheuvel
2022-04-11  9:47   ` Ard Biesheuvel
2022-04-11  9:47 ` [PATCH v3 03/30] arm64: head: move assignment of idmap_t0sz to C code Ard Biesheuvel
2022-04-11  9:47   ` Ard Biesheuvel
2022-04-11  9:47 ` [PATCH v3 04/30] arm64: head: drop idmap_ptrs_per_pgd Ard Biesheuvel
2022-04-11  9:47   ` Ard Biesheuvel
2022-04-11  9:47 ` [PATCH v3 05/30] arm64: head: simplify page table mapping macros (slightly) Ard Biesheuvel
2022-04-11  9:47   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 06/30] arm64: head: switch to map_memory macro for the extended ID map Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 07/30] arm64: head: split off idmap creation code Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 08/30] arm64: kernel: drop unnecessary PoC cache clean+invalidate Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 09/30] arm64: head: pass ID map root table address to __enable_mmu() Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 10/30] arm64: mm: provide idmap pointer to cpu_replace_ttbr1() Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 11/30] arm64: head: add helper function to remap regions in early page tables Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 12/30] arm64: head: cover entire kernel image in initial ID map Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 13/30] arm64: head: use relative references to the RELA and RELR tables Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 14/30] arm64: head: create a temporary FDT mapping in the initial ID map Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 15/30] arm64: idreg-override: use early FDT mapping in " Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 16/30] arm64: head: factor out TTBR1 assignment into a macro Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 17/30] arm64: head: populate kernel page tables with MMU and caches on Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 18/30] arm64: head: record CPU boot mode after enabling the MMU Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 19/30] arm64: kaslr: deal with init called with VA randomization enabled Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 20/30] arm64: head: relocate kernel only a single time if KASLR is enabled Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 21/30] arm64: head: remap the kernel text/inittext region read-only Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 22/30] arm64: setup: drop early FDT pointer helpers Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 23/30] arm64: mm: move ro_after_init section into the data segment Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 24/30] arm64: mm: add support for WXN memory translation attribute Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 25/30] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 26/30] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` Ard Biesheuvel [this message]
2022-04-11  9:48   ` [PATCH v3 27/30] arm64: head: clean the ID map page to the PoC Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 28/30] efi: libstub: pass image handle to handle_kernel_image() Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 29/30] efi/arm64: libstub: run image in place if randomized by the loader Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-11  9:48 ` [PATCH v3 30/30] arm64: efi/libstub: enter with the MMU on if executing in place Ard Biesheuvel
2022-04-11  9:48   ` Ard Biesheuvel
2022-04-12 16:59 ` [PATCH v3 00/30] arm64: support WXN and entry with MMU enabled Kees Cook
2022-04-12 16:59   ` Kees Cook

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