diff for duplicates of <20220412100713.1415094-2-apatel@ventanamicro.com> diff --git a/a/1.txt b/N1/1.txt index a08a1af..db50fa0 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -305,7 +305,7 @@ index f80a34fbf102..dc0520792e31 100644 * * We support both options mentioned above. To achieve this, we - * always set 'A' and 'D' PTE bits at time of creating stage2 -+ * always set 'A' and 'D' PTE bits@time of creating G-stage ++ * always set 'A' and 'D' PTE bits at time of creating G-stage * mapping. To support KVM dirty page logging with both options - * mentioned above, we will write-protect stage2 PTEs to track + * mentioned above, we will write-protect G-stage PTEs to track @@ -905,3 +905,9 @@ index 2fa4f7b1813d..01fdc342ad76 100644 } -- 2.25.1 + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index 0542544..20d0631 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -2,7 +2,17 @@ "From\0Anup Patel <apatel@ventanamicro.com>\0" "Subject\0[PATCH 1/6] RISC-V: KVM: Use G-stage name for hypervisor page table\0" "Date\0Tue, 12 Apr 2022 15:37:08 +0530\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>" + " Atish Patra <atishp@atishpatra.org>\0" + "Cc\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Alistair Francis <Alistair.Francis@wdc.com> + Anup Patel <anup@brainfault.org> + kvm@vger.kernel.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + " Anup Patel <apatel@ventanamicro.com>\0" "\00:1\0" "b\0" "The two-stage address translation defined by the RISC-V privileged\n" @@ -312,7 +322,7 @@ " \t *\n" " \t * We support both options mentioned above. To achieve this, we\n" "-\t * always set 'A' and 'D' PTE bits at time of creating stage2\n" - "+\t * always set 'A' and 'D' PTE bits@time of creating G-stage\n" + "+\t * always set 'A' and 'D' PTE bits at time of creating G-stage\n" " \t * mapping. To support KVM dirty page logging with both options\n" "-\t * mentioned above, we will write-protect stage2 PTEs to track\n" "+\t * mentioned above, we will write-protect G-stage PTEs to track\n" @@ -911,6 +921,12 @@ " \t\tkvm_make_request(KVM_REQ_UPDATE_HGATP, v);\n" " }\n" "-- \n" - 2.25.1 + "2.25.1\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -c07047de7ee091e641ae3fa997b6a988cfb78967b1e3b3bca821acac34167a87 +d66dfea6dded56585a3edc9c7df4d24d8b01f1916c2f78111ef99f3b3f34dc11
diff --git a/a/1.txt b/N2/1.txt index a08a1af..4ca7a00 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -305,7 +305,7 @@ index f80a34fbf102..dc0520792e31 100644 * * We support both options mentioned above. To achieve this, we - * always set 'A' and 'D' PTE bits at time of creating stage2 -+ * always set 'A' and 'D' PTE bits@time of creating G-stage ++ * always set 'A' and 'D' PTE bits at time of creating G-stage * mapping. To support KVM dirty page logging with both options - * mentioned above, we will write-protect stage2 PTEs to track + * mentioned above, we will write-protect G-stage PTEs to track diff --git a/a/content_digest b/N2/content_digest index 0542544..2a823c6 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,7 +2,17 @@ "From\0Anup Patel <apatel@ventanamicro.com>\0" "Subject\0[PATCH 1/6] RISC-V: KVM: Use G-stage name for hypervisor page table\0" "Date\0Tue, 12 Apr 2022 15:37:08 +0530\0" - "To\0kvm-riscv@lists.infradead.org\0" + "To\0Paolo Bonzini <pbonzini@redhat.com>" + " Atish Patra <atishp@atishpatra.org>\0" + "Cc\0Palmer Dabbelt <palmer@dabbelt.com>" + Paul Walmsley <paul.walmsley@sifive.com> + Alistair Francis <Alistair.Francis@wdc.com> + Anup Patel <anup@brainfault.org> + kvm@vger.kernel.org + kvm-riscv@lists.infradead.org + linux-riscv@lists.infradead.org + linux-kernel@vger.kernel.org + " Anup Patel <apatel@ventanamicro.com>\0" "\00:1\0" "b\0" "The two-stage address translation defined by the RISC-V privileged\n" @@ -312,7 +322,7 @@ " \t *\n" " \t * We support both options mentioned above. To achieve this, we\n" "-\t * always set 'A' and 'D' PTE bits at time of creating stage2\n" - "+\t * always set 'A' and 'D' PTE bits@time of creating G-stage\n" + "+\t * always set 'A' and 'D' PTE bits at time of creating G-stage\n" " \t * mapping. To support KVM dirty page logging with both options\n" "-\t * mentioned above, we will write-protect stage2 PTEs to track\n" "+\t * mentioned above, we will write-protect G-stage PTEs to track\n" @@ -913,4 +923,4 @@ "-- \n" 2.25.1 -c07047de7ee091e641ae3fa997b6a988cfb78967b1e3b3bca821acac34167a87 +7f51bf0431acd8a80bc3b69c446daa81d386b0ab7c3a91ae0fda0e76eaa1c1c6
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