From: Gil Fine <gil.fine@intel.com>
To: andreas.noever@gmail.com, michael.jamet@intel.com,
mika.westerberg@linux.intel.com, YehezkelShB@gmail.com
Cc: gil.fine@intel.com, linux-usb@vger.kernel.org, lukas@wunner.de
Subject: [PATCH 5/5] thunderbolt: Change TMU mode to Hifi-Uni once DP tunneled
Date: Sun, 1 May 2022 23:33:21 +0300 [thread overview]
Message-ID: <20220501203321.19021-6-gil.fine@intel.com> (raw)
In-Reply-To: <20220501203321.19021-1-gil.fine@intel.com>
Here we configure TMU mode to Hifi-Uni once DP tunnel is created.
This is due to accuracy requirement for DP tunneling as appears in
CM guide 1.0, section 7.3.2
Due to Intel HW limitation, once we changed the TMU mode to Hifi-Uni
(when DP is tunnel exists), we don't change TMU mode back to Normal-Uni,
even if DP tunnel is teared-down later.
Signed-off-by: Gil Fine <gil.fine@intel.com>
---
drivers/thunderbolt/tb.c | 40 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/drivers/thunderbolt/tb.c b/drivers/thunderbolt/tb.c
index 05a084e3e9f6..efe53d221ca8 100644
--- a/drivers/thunderbolt/tb.c
+++ b/drivers/thunderbolt/tb.c
@@ -50,6 +50,8 @@ struct tb_hotplug_event {
};
static void tb_handle_hotplug(struct work_struct *work);
+static int tb_enable_tmu_1st_child(struct tb *tb,
+ enum tb_switch_tmu_rate rate);
static void tb_queue_hotplug(struct tb *tb, u64 route, u8 port, bool unplug)
{
@@ -118,6 +120,13 @@ static void tb_switch_discover_tunnels(struct tb_switch *sw,
switch (port->config.type) {
case TB_TYPE_DP_HDMI_IN:
tunnel = tb_tunnel_discover_dp(tb, port, alloc_hopids);
+ /*
+ * In case of DP tunnel exists, change TMU mode to
+ * HiFi for CL0s to work.
+ */
+ if (tunnel)
+ tb_enable_tmu_1st_child(tb,
+ TB_SWITCH_TMU_RATE_HIFI);
break;
case TB_TYPE_PCIE_DOWN:
@@ -235,6 +244,31 @@ static int tb_enable_tmu(struct tb_switch *sw)
return tb_switch_tmu_enable(sw);
}
+/*
+ * Once a DP tunnel exists in the domain, we set the TMU mode so that
+ * it meets the accuracy requirements and also enables CLx entry (CL0s).
+ * We set the TMU mode of the first depth router(s) for CL0s to work.
+ */
+static int tb_enable_tmu_1st_child(struct tb *tb, enum tb_switch_tmu_rate rate)
+{
+ struct tb_switch *root_sw = tb->root_switch;
+ struct tb_port *port;
+
+ tb_switch_for_each_port(root_sw, port) {
+ struct tb_switch *sw;
+ int ret;
+
+ if (!tb_port_has_remote(port) || !tb_port_is_null(port))
+ continue;
+ sw = port->remote->sw;
+ tb_switch_tmu_configure(sw, rate, tb_switch_is_clx_enabled(sw));
+ if (tb_switch_tmu_enable(sw))
+ tb_dbg(tb, "Fail switching TMU to HiFi for 1st depth router %d\n", ret);
+ }
+
+ return 0;
+}
+
/**
* tb_find_unused_port() - return the first inactive port on @sw
* @sw: Switch to find the port on
@@ -981,6 +1015,12 @@ static void tb_tunnel_dp(struct tb *tb)
list_add_tail(&tunnel->list, &tcm->tunnel_list);
tb_reclaim_usb3_bandwidth(tb, in, out);
+ /*
+ * In case of DP tunnel exists, change TMU mode to
+ * HiFi for CL0s to work.
+ */
+ tb_enable_tmu_1st_child(tb, TB_SWITCH_TMU_RATE_HIFI);
+
return;
err_free:
--
2.17.1
---------------------------------------------------------------------
Intel Israel (74) Limited
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
next prev parent reply other threads:[~2022-05-01 20:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-01 20:33 [PATCH 0/5] thunderbolt: CL1 support for USB4 and Titan Ridge Gil Fine
2022-05-01 20:33 ` [PATCH 1/5] thunderbolt: Silently ignore CLx enabling in case CLx is not supported Gil Fine
2022-05-02 9:50 ` Mika Westerberg
2022-05-04 10:51 ` Gil Fine
2022-05-04 10:59 ` Mika Westerberg
2022-05-01 20:33 ` [PATCH 2/5] thunderbolt: CLx disable before system suspend only if previously enabled Gil Fine
2022-05-02 9:52 ` Mika Westerberg
2022-05-08 7:51 ` Gil Fine
2022-05-01 20:33 ` [PATCH 3/5] thunderbolt: Change downstream router's TMU rate in both TMU uni/bidir mode Gil Fine
2022-05-01 20:33 ` [PATCH 4/5] thunderbolt: Add CL1 support for USB4 and Titan Ridge routers Gil Fine
2022-05-02 10:04 ` Mika Westerberg
2022-05-04 10:52 ` Gil Fine
2022-05-04 11:03 ` Mika Westerberg
2022-05-01 20:33 ` Gil Fine [this message]
2022-05-01 23:20 ` [PATCH 5/5] thunderbolt: Change TMU mode to Hifi-Uni once DP tunneled kernel test robot
2022-05-02 10:09 ` Mika Westerberg
2022-05-08 12:44 ` Gil Fine
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220501203321.19021-6-gil.fine@intel.com \
--to=gil.fine@intel.com \
--cc=YehezkelShB@gmail.com \
--cc=andreas.noever@gmail.com \
--cc=linux-usb@vger.kernel.org \
--cc=lukas@wunner.de \
--cc=michael.jamet@intel.com \
--cc=mika.westerberg@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.