From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6D680C433EF for ; Wed, 4 May 2022 20:53:22 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id BFD4483FF2; Wed, 4 May 2022 22:52:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="nQlu45uE"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8378183F11; Wed, 4 May 2022 22:52:42 +0200 (CEST) Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1262283EFE for ; Wed, 4 May 2022 22:52:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=afd@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 244KqUc8026845; Wed, 4 May 2022 15:52:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1651697550; bh=u2rk29T9Gc6RncLARzqT5ajvFbXRAlzcgN7frcQUIQM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=nQlu45uEh1xkQGtlZPq8aI6o7JXfjPt3XvpOftYgDMXirkrt6EDOcvGaqtblPYlCo H3w2B+1ol7KI2S1d5Hlurruqu1JuOfNR0aO2frDFc7o2P/nmKFF4DyzOddfGC7VHkG 3M+Avdm8Lja8WeuRcyMjyZwLSZmF9qKFdytz7eHk= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 244KqUwp031718 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 4 May 2022 15:52:30 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Wed, 4 May 2022 15:52:30 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Wed, 4 May 2022 15:52:30 -0500 Received: from ula0226330.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 244KqTXL026299; Wed, 4 May 2022 15:52:30 -0500 From: Andrew Davis To: Simon Glass , Tom Rini , CC: Andrew Davis Subject: [PATCH 4/4] boot: Kconfig: Enable FIT processing by default on TI secure devices Date: Wed, 4 May 2022 15:52:28 -0500 Message-ID: <20220504205228.5153-4-afd@ti.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220504205228.5153-1-afd@ti.com> References: <20220504205228.5153-1-afd@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean TI secure devices chain-of-trust depends on FIT image processing, enable it by default on these devices. This also reduces the delta between the secure and non-secure defconfig files. Signed-off-by: Andrew Davis --- boot/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/boot/Kconfig b/boot/Kconfig index 9780473190..dff4d23b88 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -123,6 +123,7 @@ config FIT_BEST_MATCH config FIT_IMAGE_POST_PROCESS bool "Enable post-processing of FIT artifacts after loading by U-Boot" depends on TI_SECURE_DEVICE || SOCFPGA_SECURE_VAB_AUTH + default y if TI_SECURE_DEVICE help Allows doing any sort of manipulation to blobs after they got extracted from FIT images like stripping off headers or modifying the size of the @@ -254,6 +255,7 @@ config SPL_LOAD_FIT_FULL config SPL_FIT_IMAGE_POST_PROCESS bool "Enable post-processing of FIT artifacts after loading by the SPL" depends on SPL_LOAD_FIT + default y if TI_SECURE_DEVICE help Allows doing any sort of manipulation to blobs after they got extracted from the U-Boot FIT image like stripping off headers or modifying the -- 2.36.0