From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from smtp1.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFB35C433F5 for ; Mon, 16 May 2022 14:20:32 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp1.osuosl.org (Postfix) with ESMTP id 97359827F0; Mon, 16 May 2022 14:20:32 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp1.osuosl.org ([127.0.0.1]) by localhost (smtp1.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IwOq0uPoHTYf; Mon, 16 May 2022 14:20:31 +0000 (UTC) Received: from lists.linuxfoundation.org (lf-lists.osuosl.org [140.211.9.56]) by smtp1.osuosl.org (Postfix) with ESMTPS id 74D7C827DE; Mon, 16 May 2022 14:20:31 +0000 (UTC) Received: from lf-lists.osuosl.org (localhost [127.0.0.1]) by lists.linuxfoundation.org (Postfix) with ESMTP id 3211BC0032; Mon, 16 May 2022 14:20:31 +0000 (UTC) Received: from smtp4.osuosl.org (smtp4.osuosl.org [IPv6:2605:bc80:3010::137]) by lists.linuxfoundation.org (Postfix) with ESMTP id 76803C002D for ; Mon, 16 May 2022 14:20:29 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by smtp4.osuosl.org (Postfix) with ESMTP id 54E3241854 for ; Mon, 16 May 2022 14:20:29 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from smtp4.osuosl.org ([127.0.0.1]) by localhost (smtp4.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id D_3EbyogpQhD for ; Mon, 16 May 2022 14:20:28 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.8.0 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by smtp4.osuosl.org (Postfix) with ESMTPS id 3499D41853 for ; Mon, 16 May 2022 14:20:28 +0000 (UTC) Received: from fraeml735-chm.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4L21Y13WBjz67KdQ; Mon, 16 May 2022 22:17:25 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml735-chm.china.huawei.com (10.206.15.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 16 May 2022 16:20:25 +0200 Received: from localhost (10.202.226.42) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 16 May 2022 15:20:24 +0100 Date: Mon, 16 May 2022 15:20:22 +0100 To: Yicong Yang Subject: Re: [PATCH v8 5/8] perf tool: Add support for HiSilicon PCIe Tune and Trace device driver Message-ID: <20220516152022.00001ab9@Huawei.com> In-Reply-To: <20220516125223.32012-6-yangyicong@hisilicon.com> References: <20220516125223.32012-1-yangyicong@hisilicon.com> <20220516125223.32012-6-yangyicong@hisilicon.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.29; i686-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.202.226.42] X-ClientProxiedBy: lhreml736-chm.china.huawei.com (10.201.108.87) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Cc: mark.rutland@arm.com, prime.zeng@huawei.com, alexander.shishkin@linux.intel.com, linux-pci@vger.kernel.org, linuxarm@huawei.com, james.clark@arm.com, will@kernel.org, peterz@infradead.org, mingo@redhat.com, helgaas@kernel.org, liuqi115@huawei.com, suzuki.poulose@arm.com, acme@kernel.org, zhangshaokun@hisilicon.com, linux-arm-kernel@lists.infradead.org, mathieu.poirier@linaro.org, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, iommu@lists.linux-foundation.org, leo.yan@linaro.org, robin.murphy@arm.com X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Jonathan Cameron via iommu Reply-To: Jonathan Cameron Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Mon, 16 May 2022 20:52:20 +0800 Yicong Yang wrote: > From: Qi Liu > > HiSilicon PCIe tune and trace device (PTT) could dynamically tune > the PCIe link's events, and trace the TLP headers). > > This patch add support for PTT device in perf tool, so users could > use 'perf record' to get TLP headers trace data. > > Signed-off-by: Qi Liu > Signed-off-by: Yicong Yang One query inline. > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c > index 384c7cfda0fd..297fffedf45e 100644 > --- a/tools/perf/arch/arm/util/auxtrace.c > +++ b/tools/perf/arch/arm/util/auxtrace.c ... > static struct perf_pmu *find_pmu_for_event(struct perf_pmu **pmus, > int pmu_nr, struct evsel *evsel) > { > @@ -71,17 +120,21 @@ struct auxtrace_record > { > struct perf_pmu *cs_etm_pmu = NULL; > struct perf_pmu **arm_spe_pmus = NULL; > + struct perf_pmu **hisi_ptt_pmus = NULL; > struct evsel *evsel; > struct perf_pmu *found_etm = NULL; > struct perf_pmu *found_spe = NULL; > + struct perf_pmu *found_ptt = NULL; > int auxtrace_event_cnt = 0; > int nr_spes = 0; > + int nr_ptts = 0; > > if (!evlist) > return NULL; > > cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); > arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); > + hisi_ptt_pmus = find_all_hisi_ptt_pmus(&nr_ptts, err); > > evlist__for_each_entry(evlist, evsel) { > if (cs_etm_pmu && !found_etm) > @@ -89,9 +142,13 @@ struct auxtrace_record > > if (arm_spe_pmus && !found_spe) > found_spe = find_pmu_for_event(arm_spe_pmus, nr_spes, evsel); > + > + if (arm_spe_pmus && !found_spe) if (hisi_ptt_pmus && !found_ptt) ? Otherwise, I'm not sure what the purpose of the checking against spe is. > + found_ptt = find_pmu_for_event(hisi_ptt_pmus, nr_ptts, evsel); > } > > free(arm_spe_pmus); > + free(hisi_ptt_pmus); > > if (found_etm) > auxtrace_event_cnt++; > @@ -99,6 +156,9 @@ struct auxtrace_record > if (found_spe) > auxtrace_event_cnt++; > > + if (found_ptt) > + auxtrace_event_cnt++; > + > if (auxtrace_event_cnt > 1) { > pr_err("Concurrent AUX trace operation not currently supported\n"); > *err = -EOPNOTSUPP; > @@ -111,6 +171,9 @@ struct auxtrace_record > #if defined(__aarch64__) > if (found_spe) > return arm_spe_recording_init(err, found_spe); > + > + if (found_ptt) > + return hisi_ptt_recording_init(err, found_ptt); > #endif > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C51EC433FE for ; Mon, 16 May 2022 14:20:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244439AbiEPOUc (ORCPT ); Mon, 16 May 2022 10:20:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242798AbiEPOU2 (ORCPT ); Mon, 16 May 2022 10:20:28 -0400 Received: from frasgout.his.huawei.com (frasgout.his.huawei.com [185.176.79.56]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 351B63B00C; Mon, 16 May 2022 07:20:27 -0700 (PDT) Received: from fraeml735-chm.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4L21Y13WBjz67KdQ; Mon, 16 May 2022 22:17:25 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml735-chm.china.huawei.com (10.206.15.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 16 May 2022 16:20:25 +0200 Received: from localhost (10.202.226.42) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 16 May 2022 15:20:24 +0100 Date: Mon, 16 May 2022 15:20:22 +0100 From: Jonathan Cameron To: Yicong Yang CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v8 5/8] perf tool: Add support for HiSilicon PCIe Tune and Trace device driver Message-ID: <20220516152022.00001ab9@Huawei.com> In-Reply-To: <20220516125223.32012-6-yangyicong@hisilicon.com> References: <20220516125223.32012-1-yangyicong@hisilicon.com> <20220516125223.32012-6-yangyicong@hisilicon.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.29; i686-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Originating-IP: [10.202.226.42] X-ClientProxiedBy: lhreml736-chm.china.huawei.com (10.201.108.87) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Mon, 16 May 2022 20:52:20 +0800 Yicong Yang wrote: > From: Qi Liu > > HiSilicon PCIe tune and trace device (PTT) could dynamically tune > the PCIe link's events, and trace the TLP headers). > > This patch add support for PTT device in perf tool, so users could > use 'perf record' to get TLP headers trace data. > > Signed-off-by: Qi Liu > Signed-off-by: Yicong Yang One query inline. > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c > index 384c7cfda0fd..297fffedf45e 100644 > --- a/tools/perf/arch/arm/util/auxtrace.c > +++ b/tools/perf/arch/arm/util/auxtrace.c ... > static struct perf_pmu *find_pmu_for_event(struct perf_pmu **pmus, > int pmu_nr, struct evsel *evsel) > { > @@ -71,17 +120,21 @@ struct auxtrace_record > { > struct perf_pmu *cs_etm_pmu = NULL; > struct perf_pmu **arm_spe_pmus = NULL; > + struct perf_pmu **hisi_ptt_pmus = NULL; > struct evsel *evsel; > struct perf_pmu *found_etm = NULL; > struct perf_pmu *found_spe = NULL; > + struct perf_pmu *found_ptt = NULL; > int auxtrace_event_cnt = 0; > int nr_spes = 0; > + int nr_ptts = 0; > > if (!evlist) > return NULL; > > cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); > arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); > + hisi_ptt_pmus = find_all_hisi_ptt_pmus(&nr_ptts, err); > > evlist__for_each_entry(evlist, evsel) { > if (cs_etm_pmu && !found_etm) > @@ -89,9 +142,13 @@ struct auxtrace_record > > if (arm_spe_pmus && !found_spe) > found_spe = find_pmu_for_event(arm_spe_pmus, nr_spes, evsel); > + > + if (arm_spe_pmus && !found_spe) if (hisi_ptt_pmus && !found_ptt) ? Otherwise, I'm not sure what the purpose of the checking against spe is. > + found_ptt = find_pmu_for_event(hisi_ptt_pmus, nr_ptts, evsel); > } > > free(arm_spe_pmus); > + free(hisi_ptt_pmus); > > if (found_etm) > auxtrace_event_cnt++; > @@ -99,6 +156,9 @@ struct auxtrace_record > if (found_spe) > auxtrace_event_cnt++; > > + if (found_ptt) > + auxtrace_event_cnt++; > + > if (auxtrace_event_cnt > 1) { > pr_err("Concurrent AUX trace operation not currently supported\n"); > *err = -EOPNOTSUPP; > @@ -111,6 +171,9 @@ struct auxtrace_record > #if defined(__aarch64__) > if (found_spe) > return arm_spe_recording_init(err, found_spe); > + > + if (found_ptt) > + return hisi_ptt_recording_init(err, found_ptt); > #endif > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C8EC0C433EF for ; Mon, 16 May 2022 14:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Subject:CC:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XirATyS9WSKnpXrG2KnuqLnNc93Pnp06DjAZcMKw9v8=; b=xbwlgSv4h9rEDs o8bsb/35lWPnx5zKoc2HELzcusewEAlyJusdfQ61DlwuigqS4Me6rvGxB8lvxd/N/BRONCtbIgAmi BgsJCzYLwfihrkp8byxx4XBPYvAFr2VDARGboiRcUKPuSLxW4yaY2IpTgu5nkMqgDI3yDtGDxNk2V PLBtU+IOa8hckvehqv36JS2KBOIi7TLimSYXP/Cm6Cc3riBYB929zQewOnRKBXQZ/7wJ/om+FpL4h Q1lTOcpG7fy6qDA+OGJH0UFka7C5c8h92cwQGxnUIHiA4kHLnqoWKsSydz4dLiVwAX5UZR/EF1XwX gL2YTh8Talun/SwUAK0w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqbaO-008Ijo-IS; Mon, 16 May 2022 14:20:36 +0000 Received: from frasgout.his.huawei.com ([185.176.79.56]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nqbaF-008IeU-Aw for linux-arm-kernel@lists.infradead.org; Mon, 16 May 2022 14:20:33 +0000 Received: from fraeml735-chm.china.huawei.com (unknown [172.18.147.201]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4L21Y13WBjz67KdQ; Mon, 16 May 2022 22:17:25 +0800 (CST) Received: from lhreml710-chm.china.huawei.com (10.201.108.61) by fraeml735-chm.china.huawei.com (10.206.15.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 16 May 2022 16:20:25 +0200 Received: from localhost (10.202.226.42) by lhreml710-chm.china.huawei.com (10.201.108.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Mon, 16 May 2022 15:20:24 +0100 Date: Mon, 16 May 2022 15:20:22 +0100 From: Jonathan Cameron To: Yicong Yang CC: , , , , , , , , , , , , , , , , , , , , , , , , , Subject: Re: [PATCH v8 5/8] perf tool: Add support for HiSilicon PCIe Tune and Trace device driver Message-ID: <20220516152022.00001ab9@Huawei.com> In-Reply-To: <20220516125223.32012-6-yangyicong@hisilicon.com> References: <20220516125223.32012-1-yangyicong@hisilicon.com> <20220516125223.32012-6-yangyicong@hisilicon.com> Organization: Huawei Technologies Research and Development (UK) Ltd. X-Mailer: Claws Mail 4.0.0 (GTK+ 3.24.29; i686-w64-mingw32) MIME-Version: 1.0 X-Originating-IP: [10.202.226.42] X-ClientProxiedBy: lhreml736-chm.china.huawei.com (10.201.108.87) To lhreml710-chm.china.huawei.com (10.201.108.61) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220516_072027_790119_6109FB3F X-CRM114-Status: GOOD ( 17.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 16 May 2022 20:52:20 +0800 Yicong Yang wrote: > From: Qi Liu > > HiSilicon PCIe tune and trace device (PTT) could dynamically tune > the PCIe link's events, and trace the TLP headers). > > This patch add support for PTT device in perf tool, so users could > use 'perf record' to get TLP headers trace data. > > Signed-off-by: Qi Liu > Signed-off-by: Yicong Yang One query inline. > diff --git a/tools/perf/arch/arm/util/auxtrace.c b/tools/perf/arch/arm/util/auxtrace.c > index 384c7cfda0fd..297fffedf45e 100644 > --- a/tools/perf/arch/arm/util/auxtrace.c > +++ b/tools/perf/arch/arm/util/auxtrace.c ... > static struct perf_pmu *find_pmu_for_event(struct perf_pmu **pmus, > int pmu_nr, struct evsel *evsel) > { > @@ -71,17 +120,21 @@ struct auxtrace_record > { > struct perf_pmu *cs_etm_pmu = NULL; > struct perf_pmu **arm_spe_pmus = NULL; > + struct perf_pmu **hisi_ptt_pmus = NULL; > struct evsel *evsel; > struct perf_pmu *found_etm = NULL; > struct perf_pmu *found_spe = NULL; > + struct perf_pmu *found_ptt = NULL; > int auxtrace_event_cnt = 0; > int nr_spes = 0; > + int nr_ptts = 0; > > if (!evlist) > return NULL; > > cs_etm_pmu = perf_pmu__find(CORESIGHT_ETM_PMU_NAME); > arm_spe_pmus = find_all_arm_spe_pmus(&nr_spes, err); > + hisi_ptt_pmus = find_all_hisi_ptt_pmus(&nr_ptts, err); > > evlist__for_each_entry(evlist, evsel) { > if (cs_etm_pmu && !found_etm) > @@ -89,9 +142,13 @@ struct auxtrace_record > > if (arm_spe_pmus && !found_spe) > found_spe = find_pmu_for_event(arm_spe_pmus, nr_spes, evsel); > + > + if (arm_spe_pmus && !found_spe) if (hisi_ptt_pmus && !found_ptt) ? Otherwise, I'm not sure what the purpose of the checking against spe is. > + found_ptt = find_pmu_for_event(hisi_ptt_pmus, nr_ptts, evsel); > } > > free(arm_spe_pmus); > + free(hisi_ptt_pmus); > > if (found_etm) > auxtrace_event_cnt++; > @@ -99,6 +156,9 @@ struct auxtrace_record > if (found_spe) > auxtrace_event_cnt++; > > + if (found_ptt) > + auxtrace_event_cnt++; > + > if (auxtrace_event_cnt > 1) { > pr_err("Concurrent AUX trace operation not currently supported\n"); > *err = -EOPNOTSUPP; > @@ -111,6 +171,9 @@ struct auxtrace_record > #if defined(__aarch64__) > if (found_spe) > return arm_spe_recording_init(err, found_spe); > + > + if (found_ptt) > + return hisi_ptt_recording_init(err, found_ptt); > #endif > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel