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From: Josua Mayer <josua@solid-run.com>
To: netdev@vger.kernel.org
Cc: alvaro.karsz@solid-run.com, Josua Mayer <josua@solid-run.com>,
	Michael Hennerich <michael.hennerich@analog.com>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Alexandru Ardelean <alexandru.ardelean@analog.com>
Subject: [PATCH v5 1/3] dt-bindings: net: adin: document phy clock output properties
Date: Tue, 17 May 2022 11:54:29 +0300	[thread overview]
Message-ID: <20220517085431.3895-1-josua@solid-run.com> (raw)
In-Reply-To: <20220517085143.3749-1-josua@solid-run.com>

The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.

Add DT properties to configure both pins.

Technically the phy also supports a recovered 125MHz clock for
synchronous ethernet. However SyncE should be configured dynamically at
runtime, so it is explicitly omitted in this binding.

Signed-off-by: Josua Mayer <josua@solid-run.com>
---
V4 -> V5: removed recovered clock options
V3 -> V4: changed type of adi,phy-output-reference-clock to boolean
V1 -> V2: changed clkout property to enum
V1 -> V2: added property for CLK25_REF pin

 .../devicetree/bindings/net/adi,adin.yaml         | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
index 1129f2b58e98..77750df0c2c4 100644
--- a/Documentation/devicetree/bindings/net/adi,adin.yaml
+++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
@@ -36,6 +36,21 @@ properties:
     enum: [ 4, 8, 12, 16, 20, 24 ]
     default: 8
 
+  adi,phy-output-clock:
+    description: Select clock output on GP_CLK pin. Two clocks are available:
+      A 25MHz reference and a free-running 125MHz.
+      The phy can alternatively automatically switch between the reference and
+      the 125MHz clocks based on its internal state.
+    $ref: /schemas/types.yaml#/definitions/string
+    enum:
+      - 25mhz-reference
+      - 125mhz-free-running
+      - adaptive-free-running
+
+  adi,phy-output-reference-clock:
+    description: Enable 25MHz reference clock output on CLK25_REF pin.
+    type: boolean
+
 unevaluatedProperties: false
 
 examples:
-- 
2.35.3


  reply	other threads:[~2022-05-17  8:54 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17  8:51 [PATCH v5 0/3] adin: add support for clock output Josua Mayer
2022-05-17  8:54 ` Josua Mayer [this message]
2022-05-17  8:54   ` [PATCH v5 2/3] net: phy: " Josua Mayer
2022-05-17  8:54   ` [PATCH v5 3/3] ARM: dts: imx6qdl-sr-som: update phy configuration for som revision 1.9 Josua Mayer
2022-05-17  9:20   ` [PATCH v5 1/3] dt-bindings: net: adin: document phy clock output properties Krzysztof Kozlowski
2022-05-23 16:10   ` Rob Herring
2022-05-18  1:16 ` [PATCH v5 0/3] adin: add support for clock output Jakub Kicinski
2022-05-19  3:10 ` patchwork-bot+netdevbpf

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