From: Piyush Malgujar <pmalgujar@marvell.com>
To: Bartosz Golaszewski <brgl@bgdev.pl>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
devicetree <devicetree@vger.kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
"Rob Herring" <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Robert Richter <rric@kernel.org>, <cchavva@marvell.com>,
<wsadowski@marvell.com>
Subject: Re: [PATCH 1/5] gpio: thunderx: avoid potential deadlock
Date: Wed, 25 May 2022 06:17:38 -0700 [thread overview]
Message-ID: <20220525131738.GA10532@Dell2s-9> (raw)
In-Reply-To: <CAMRc=Mf91eMF7D6CRtA8-HQ7pdtP343WUGhLG4qti_9zJF4ELQ@mail.gmail.com>
On Mon, May 02, 2022 at 01:18:49PM +0200, Bartosz Golaszewski wrote:
> On Wed, Apr 27, 2022 at 4:46 PM Piyush Malgujar <pmalgujar@marvell.com> wrote:
> >
> > Using irqsave/irqrestore locking variants to avoid any deadlock.
> >
>
> I see you'll be resending this anyway so would you mind providing an
> example of a deadlock that is possible with no-irqsave variants?
> Thanks.
>
> Bart
>
Hi Bartosz,
Thanks for the review.
Please find below the issue scenario:
In the case when HARDIRQ-safe -> HARDIRQ-unsafe lock order is detected
and interrupt occurs, deadlock could occur.
========================================================
WARNING: possible irq lock inversion dependency detected
5.18.0-rc6 #4 Not tainted
--------------------------------------------------------
swapper/3/0 just changed the state of lock:
ffff000110904cd8 (lock_class){-...}-{2:2}, at: handle_fasteoi_ack_irq+0x2c/0x1b0
but this lock took another, HARDIRQ-unsafe lock in the past:
(&txgpio->lock){+.+.}-{2:2}
and interrupts could create inverse lock ordering between them.
other info that might help us debug this:
Possible interrupt unsafe locking scenario:
CPU0 CPU1
---- ----
lock(&txgpio->lock);
local_irq_disable();
lock(lock_class);
lock(&txgpio->lock);
<Interrupt>
lock(lock_class);
*** DEADLOCK ***
==========================================================
Thanks,
Piyush
> > Signed-off-by: Piyush Malgujar <pmalgujar@marvell.com>
> > ---
next prev parent reply other threads:[~2022-05-25 13:18 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-27 14:46 [PATCH 0/5] gpio: thunderx: Marvell GPIO changes Piyush Malgujar
2022-04-27 14:46 ` [PATCH 1/5] gpio: thunderx: avoid potential deadlock Piyush Malgujar
2022-05-02 11:18 ` Bartosz Golaszewski
2022-05-25 13:17 ` Piyush Malgujar [this message]
2022-05-31 17:30 ` Bartosz Golaszewski
2022-04-27 14:46 ` [PATCH 2/5] dt-bindings: gpio: gpio-thunderx: Describe pin-cfg option Piyush Malgujar
2022-05-01 22:15 ` Linus Walleij
2022-06-03 9:06 ` Piyush Malgujar
2022-06-03 10:35 ` Linus Walleij
2022-06-13 8:04 ` Piyush Malgujar
2022-06-25 22:59 ` Linus Walleij
2022-06-26 10:40 ` Krzysztof Kozlowski
2022-04-27 14:46 ` [PATCH 3/5] gpio: thunderx: Configure GPIO pins at probe Piyush Malgujar
2022-04-28 1:59 ` kernel test robot
2022-04-27 14:46 ` [PATCH 4/5] gpio: thunderx: extend PIN_SEL_MASK to cover otx2 platform Piyush Malgujar
2022-04-27 14:46 ` [PATCH 5/5] gpio: thunderx: change handler for level interrupt Piyush Malgujar
2022-05-01 22:17 ` Linus Walleij
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