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[65.184.195.139]) by smtp.gmail.com with ESMTPSA id x13-20020ac84d4d000000b00304ecf35b50sm1316323qtv.97.2022.06.23.05.34.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Jun 2022 05:35:00 -0700 (PDT) Date: Thu, 23 Jun 2022 08:34:58 -0400 From: Tom Rini To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: "Priyanka Jain (OSS)" , "Peng Fan (OSS)" , Qiang Zhao , Shengzhou Liu , Alexander Graf , Bin Meng , Wolfgang Denk , Sinan Akman , u-boot@lists.denx.de Subject: Re: [PATCH v3] powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Message-ID: <20220623123458.GZ2484912@bill-the-cat> References: <4fea4901-2d25-b867-617b-e03c152cffce@oss.nxp.com> <20220616121944.7841-1-pali@kernel.org> <20220623112910.jotuwvm5ze4rimfh@pali> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="24ZVPJRtZLpuaCtd" Content-Disposition: inline In-Reply-To: <20220623112910.jotuwvm5ze4rimfh@pali> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --24ZVPJRtZLpuaCtd Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jun 23, 2022 at 01:29:10PM +0200, Pali Roh=E1r wrote: > On Thursday 16 June 2022 14:19:44 Pali Roh=E1r wrote: > > Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are > > manually increased by 0x1000 due to .bootpg section. This section has s= ize > > of 0x1000 bytes and is manually put by linker script before .text secti= on > > (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC= is > > set. Due to this fact lot of other config options are manually increase= d by > > 0x1000 value to make correct layout. Note that entry point is not on > > CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address > > CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). > >=20 > > Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC= is > > set. Put .bootpg code directly into .text section and move text base > > address to the start of .bootpg code. And finally remove +0x1000 value = =66rom > > lot of config options. With this removal custom PHDRS is not used anymo= re, > > so remove it too. > >=20 > > After this change entry point would be at CONFIG_SPL_TEXT_BASE and not = at > > address -0x1000 anymore. > >=20 > > Tested on P2020 board with SPL and proper U-Boot. > >=20 > > Signed-off-by: Pali Roh=E1r > > --- >=20 > PING??? >=20 Yes, I thought this was part of fsl-qoriq-2022-6-20-v2 but I see it is not. I really don't want to see this have problems to apply, again. But it probably will if it's not picked up pretty much now. Peng, should I grab this for next? Otherwise someone is going to need to grab this, edit and recountdiff it for it to apply as it's really not fair to ask Pali to rebase it yet again if it doesn't and git also doesn't handle it on a rebase. --=20 Tom --24ZVPJRtZLpuaCtd Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmK0XeoACgkQFHw5/5Y0 tyyvkQv/XBKRgUJi7YGnDnQV4rHFi6j6SNbCJbDBklw2yhEZMO+2FaULlZMp/kZ6 HohFav22zWZH5CYYlF8x8LiygSptJitgGyu+8v+sWytT2T92cNNU4Cwc8QM/V30G V+xze01XUieyZRwNqwch+WXhl8Kq/6C72l9wR8S1lPc0NVs5QLehkUyPAM7vgrnW 8JskB+i96Kd+6hRNuyTbrorxgs6HYQGwIWta89x8My61oJgx86kUja1gtBX1R+NH vZwtSDpNqVjcxjtHpjr4hFnJjqPrI8iIZA23NAa7xf5MKYnniSsUgAJpGl1siy8E pCo3w+6EbYdrJCc1tRncPBaQw2/QJ2mU0t04EWoW8jHBmHT7FMkKcNwmMxGfDyYj y75IGL1lNEQf1OGHN/njUfozJyNGTfS6qNSyYu6B54lk9mnSi06cuYtfa9LfhgPI //b/N37rD7nSvwvhpzwGjtGEJRNjNyUOyAqUvcZkMFSQJ/1fBMXtsCP7GvtckjCG e14p5C2O =ysJ1 -----END PGP SIGNATURE----- --24ZVPJRtZLpuaCtd--