From: Bjorn Helgaas <helgaas@kernel.org>
To: Johan Hovold <johan+linaro@kernel.org>
Cc: "Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Stanimir Varbanov" <svarbanov@mm-sol.com>,
"Andy Gross" <agross@kernel.org>,
"Bjorn Andersson" <bjorn.andersson@linaro.org>,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: qcom: Add support for modular builds
Date: Thu, 23 Jun 2022 10:52:13 -0500 [thread overview]
Message-ID: <20220623155213.GA1450949@bhelgaas> (raw)
In-Reply-To: <20220519094646.23009-1-johan+linaro@kernel.org>
On Thu, May 19, 2022 at 11:46:46AM +0200, Johan Hovold wrote:
> Allow the Qualcomm PCIe controller driver to be built as a module, which
> is useful for multi-platform kernels as well as during development.
>
> Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
> ---
> drivers/pci/controller/dwc/Kconfig | 2 +-
> drivers/pci/controller/dwc/pcie-qcom.c | 36 +++++++++++++++++++++++---
> 2 files changed, 34 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index 62ce3abf0f19..230f56d1a268 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -168,7 +168,7 @@ config PCI_HISI
> Hip05 and Hip06 SoCs
>
> config PCIE_QCOM
> - bool "Qualcomm PCIe controller"
> + tristate "Qualcomm PCIe controller"
> depends on OF && (ARCH_QCOM || COMPILE_TEST)
> depends on PCI_MSI_IRQ_DOMAIN
> select PCIE_DW_HOST
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> index 8523b5ef9d16..e25d5c09657c 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -16,7 +16,7 @@
> #include <linux/io.h>
> #include <linux/iopoll.h>
> #include <linux/kernel.h>
> -#include <linux/init.h>
> +#include <linux/module.h>
> #include <linux/of_device.h>
> #include <linux/of_gpio.h>
> #include <linux/pci.h>
> @@ -1425,6 +1425,15 @@ static int qcom_pcie_host_init(struct pcie_port *pp)
> return ret;
> }
>
> +static void qcom_pcie_host_deinit(struct qcom_pcie *pcie)
> +{
> + qcom_ep_reset_assert(pcie);
> + if (pcie->cfg->ops->post_deinit)
> + pcie->cfg->ops->post_deinit(pcie);
> + phy_power_off(pcie->phy);
> + pcie->cfg->ops->deinit(pcie);
These post_deinit/deinit names look backwards. Why would we call a
"post_deinit()" method *before* the "deinit()" method? It would make
sense if we called "pre_deinit()" followed by "deinit()".
> static const struct dw_pcie_host_ops qcom_pcie_dw_ops = {
> .host_init = qcom_pcie_host_init,
> };
> @@ -1651,6 +1660,22 @@ static int qcom_pcie_probe(struct platform_device *pdev)
> return ret;
> }
>
> +static int qcom_pcie_remove(struct platform_device *pdev)
> +{
> + struct qcom_pcie *pcie = platform_get_drvdata(pdev);
> + struct device *dev = &pdev->dev;
> +
> + dw_pcie_host_deinit(&pcie->pci->pp);
> + qcom_pcie_host_deinit(pcie);
> +
> + phy_exit(pcie->phy);
> +
> + pm_runtime_put_sync(dev);
> + pm_runtime_disable(dev);
Why is this not more symmetric with qcom_pcie_probe()? Maybe struct
dw_pcie_host_ops needs a new .host_deinit() pointer that would be
called from dw_pcie_host_deinit()?
In the probe path, we have this:
qcom_pcie_probe
pm_runtime_enable
pm_runtime_get_sync
phy_init(pcie->phy)
dw_pcie_host_init
pp->ops->host_init
qcom_pcie_host_init # .host_init()
pcie->cfg->ops->init(pcie)
phy_power_on(pcie->phy)
pcie->cfg->ops->post_init(pcie)
qcom_ep_reset_deassert(pcie)
The remove path does do things in the opposite order, which makes
sense, but the call to qcom_pcie_host_deinit() breaks the symmetry:
qcom_pcie_remove
dw_pcie_host_deinit
qcom_pcie_host_deinit
qcom_ep_reset_assert
pcie->cfg->ops->post_deinit
phy_power_off(pcie->phy)
pcie->cfg->ops->deinit
phy_exit(pcie->phy)
pm_runtime_put_sync
pm_runtime_disable
> + return 0;
> +}
> +
> static const struct of_device_id qcom_pcie_match[] = {
> { .compatible = "qcom,pcie-apq8084", .data = &apq8084_cfg },
> { .compatible = "qcom,pcie-ipq8064", .data = &ipq8064_cfg },
> @@ -1669,6 +1694,7 @@ static const struct of_device_id qcom_pcie_match[] = {
> { .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },
> { }
> };
> +MODULE_DEVICE_TABLE(of, qcom_pcie_match);
>
> static void qcom_fixup_class(struct pci_dev *dev)
> {
> @@ -1684,10 +1710,14 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
>
> static struct platform_driver qcom_pcie_driver = {
> .probe = qcom_pcie_probe,
> + .remove = qcom_pcie_remove,
> .driver = {
> .name = "qcom-pcie",
> - .suppress_bind_attrs = true,
> .of_match_table = qcom_pcie_match,
> },
> };
> -builtin_platform_driver(qcom_pcie_driver);
> +module_platform_driver(qcom_pcie_driver);
> +
> +MODULE_AUTHOR("Stanimir Varbanov <svarbanov@mm-sol.com>");
> +MODULE_DESCRIPTION("Qualcomm PCIe root complex driver");
> +MODULE_LICENSE("GPL");
> --
> 2.35.1
>
next prev parent reply other threads:[~2022-06-23 15:52 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-19 9:46 [PATCH] PCI: qcom: Add support for modular builds Johan Hovold
2022-05-26 20:53 ` Rob Herring
2022-06-23 11:40 ` Johan Hovold
2022-06-23 15:52 ` Bjorn Helgaas [this message]
2022-06-27 7:31 ` Johan Hovold
2022-07-14 12:19 ` Stanimir Varbanov
2022-07-14 13:05 ` Dmitry Baryshkov
2022-07-15 16:56 ` Bjorn Helgaas
2022-07-18 7:43 ` Stanimir Varbanov
2022-07-14 13:10 ` Johan Hovold
2022-07-20 16:27 ` Manivannan Sadhasivam
2022-07-20 21:20 ` Bjorn Helgaas
2022-07-21 6:51 ` Johan Hovold
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