From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, rodrigo.vivi@intel.com
Subject: [Intel-gfx] [PATCH v3 4/9] drm/i915/dg2: DG2 MBD config
Date: Fri, 24 Jun 2022 21:29:17 +0530 [thread overview]
Message-ID: <20220624155922.7435-5-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20220624155922.7435-1-anshuman.gupta@intel.com>
Add DG2 Motherboard Down Config check condition
to intel_opregion_vram_sr_required().
v2:
- Use MBD Subplatform to check DG2 MBD. [Jani]
BSpec: 44477
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
drivers/gpu/drm/i915/display/intel_opregion.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 03ae57f05371..ae0862bf10a5 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -1290,6 +1290,8 @@ intel_opregion_vram_sr_required(struct drm_i915_private *i915)
if (IS_DG1(i915))
return intel_opregion_dg1_mbd_config(i915);
+ else if (IS_DG2_MBD(i915))
+ return true;
return false;
}
--
2.26.2
next prev parent reply other threads:[~2022-06-24 16:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-24 15:59 [Intel-gfx] [PATCH v3 0/9] DG2 VRAM_SR Support Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 1/9] drm/i915/dgfx: OpRegion VRAM Self Refresh Support Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 2/9] drm/i915/dg1: OpRegion PCON DG1 MBD config support Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 3/9] drm/i915/dg2: Add DG2_NB_MBD subplatform Anshuman Gupta
2022-06-24 15:59 ` Anshuman Gupta [this message]
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 5/9] drm/i915/dgfx: Add has_lmem_sr Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 6/9] drm/i915/dgfx: Setup VRAM SR with D3COLD Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 7/9] Drm/i915/rpm: Enable D3Cold VRAM SR Support Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 8/9] drm/i915/xehpsdv: Store lmem region in gt Anshuman Gupta
2022-06-24 15:59 ` [Intel-gfx] [PATCH v3 9/9] drm/i915/rpm: d3cold Policy Anshuman Gupta
2022-06-24 16:28 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for DG2 VRAM_SR Support (rev4) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220624155922.7435-5-anshuman.gupta@intel.com \
--to=anshuman.gupta@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.