From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3F44C43334 for ; Tue, 28 Jun 2022 06:43:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235321AbiF1GnV (ORCPT ); Tue, 28 Jun 2022 02:43:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245280AbiF1GnV (ORCPT ); Tue, 28 Jun 2022 02:43:21 -0400 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50E17BF66 for ; Mon, 27 Jun 2022 23:43:20 -0700 (PDT) Received: by mail-pl1-x62c.google.com with SMTP id jh14so10229342plb.1 for ; Mon, 27 Jun 2022 23:43:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:content-transfer-encoding:in-reply-to; bh=s9TUIBPvRcRxZmOZ/UKmL2STsX4RkuAASajSfCd6Jwo=; b=k1iqEHVEnLSQedel9PTf1jmE6vwsF2fufvd423d/FatBfr62j4GLx9uTphZocJsD2X t9swjbnwfX2TYX27zr3ExGrxMmK6Yvst1YES64DfOUgIubs/+txIaKhbyqxG04K4FF32 10unYr7lRp3R7tg3DDTOtumvwvuyZbRNtksC4lFzOTu0xPWjZqRYTS2KfjTK9CjrIGVW uA/9lK6N0wmW0pEi7MOamzht9CHaRTqaerW6wnyLSGMdmjRzZVzf6eB6UYFvHffKP214 QELFv2nXLIvPtMH6YFSUzGXvLnbXg8285mEbfXLR7Sb4QuxDCXYTf1q9QBcKe+46I1zx CLBQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=s9TUIBPvRcRxZmOZ/UKmL2STsX4RkuAASajSfCd6Jwo=; b=NhPh9sahnWEcJoNi9vsbYqZMMszcWsM/khYe1lSwyK/uiIzlqCvpjak1cwvFse+fBf Xwcje6WBIWimXiShscdyOOs11hC5yiPNySoj7Zhmf+WJAMeR9CIzFbzvNF74g7c7ejRw 63znIrOdSifIrX6yW1fghqNDROwtg4DNi435/nDvmVDajl2LsBDA63PS5VxmB/Emm64w dnRa6krnvcgpcWnctBejFB5kyiBmY2zzrVdaPct33+tjeu/BbNbeCD6J467P0J4oNL1U agJPRP9hziXtm53DEMKWPjYDBpTzJ9qxm44S4lmNJF11W3IuoBK+EcODmjcIxIYRN+fX yRWw== X-Gm-Message-State: AJIora/qjWyZ7ODVreUVB4gc4p8mX+0dm9HY1PC++Ug+/L06zTb0IunK /EVXxgshNqdyXAPPJSBzviuD X-Google-Smtp-Source: AGRyM1vZCMBeqIqeJwz0Z/dkETp7U0TOTadYMxdCF6m7UB503Afk9laZJZeM1ax4GiQzFjSdh7PBsg== X-Received: by 2002:a17:902:f543:b0:16a:54c6:78d0 with SMTP id h3-20020a170902f54300b0016a54c678d0mr2183859plf.28.1656398599724; Mon, 27 Jun 2022 23:43:19 -0700 (PDT) Received: from thinkpad ([27.111.75.159]) by smtp.gmail.com with ESMTPSA id u2-20020a170902714200b0016a522915e5sm8376804plm.83.2022.06.27.23.43.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jun 2022 23:43:19 -0700 (PDT) Date: Tue, 28 Jun 2022 12:13:13 +0530 From: Manivannan Sadhasivam To: Serge Semin Cc: Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , Minghuan Lian , Mingkai Hu , Roy Zang , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Jingoo Han , Gustavo Pimentel , Serge Semin , Alexey Malahov , Pavel Parkhomenko , Frank Li , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RESEND v5 13/18] PCI: dwc: Add start_link/stop_link inliners Message-ID: <20220628064313.GF23601@thinkpad> References: <20220624143428.8334-1-Sergey.Semin@baikalelectronics.ru> <20220624143428.8334-14-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220624143428.8334-14-Sergey.Semin@baikalelectronics.ru> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, Jun 24, 2022 at 05:34:23PM +0300, Serge Semin wrote: > There are several places in the generic DW PCIe code where the > platform-specific PCIe link start/stop methods are called after making > sure the ops handler and the callbacks are specified. Instead of repeating > the same pattern over and over let's define the static-inline methods in > the DW PCIe header file and use them in the relevant parts of the driver. > > Note returning a negative error from the EP link start procedure if the > start_link pointer isn't specified doesn't really make much sense since > it's perfectly normal to have such a platform. Moreover even > pci_epc_start() doesn't fail if no epc->ops->start callback is spotted. As > a side-effect of this modification we can set the generic DW PCIe and > Layerscape EP platform drivers free from the empty start_link callbacks > and as such entirely dummy dw_pcie_ops instances. > > Signed-off-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Thanks, Mani > Reviewed-by: Rob Herring > > --- > > Changelog v4: > - This is a new patch created on the v4 lap of the series. > --- > drivers/pci/controller/dwc/pci-layerscape-ep.c | 12 ------------ > drivers/pci/controller/dwc/pcie-designware-ep.c | 8 ++------ > drivers/pci/controller/dwc/pcie-designware-host.c | 10 ++++------ > drivers/pci/controller/dwc/pcie-designware-plat.c | 10 ---------- > drivers/pci/controller/dwc/pcie-designware.h | 14 ++++++++++++++ > 5 files changed, 20 insertions(+), 34 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c > index 39f4664bd84c..ad99707b3b99 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c > @@ -32,15 +32,6 @@ struct ls_pcie_ep { > const struct ls_pcie_ep_drvdata *drvdata; > }; > > -static int ls_pcie_establish_link(struct dw_pcie *pci) > -{ > - return 0; > -} > - > -static const struct dw_pcie_ops dw_ls_pcie_ep_ops = { > - .start_link = ls_pcie_establish_link, > -}; > - > static const struct pci_epc_features* > ls_pcie_ep_get_features(struct dw_pcie_ep *ep) > { > @@ -106,19 +97,16 @@ static const struct dw_pcie_ep_ops ls_pcie_ep_ops = { > > static const struct ls_pcie_ep_drvdata ls1_ep_drvdata = { > .ops = &ls_pcie_ep_ops, > - .dw_pcie_ops = &dw_ls_pcie_ep_ops, > }; > > static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = { > .func_offset = 0x20000, > .ops = &ls_pcie_ep_ops, > - .dw_pcie_ops = &dw_ls_pcie_ep_ops, > }; > > static const struct ls_pcie_ep_drvdata lx2_ep_drvdata = { > .func_offset = 0x8000, > .ops = &ls_pcie_ep_ops, > - .dw_pcie_ops = &dw_ls_pcie_ep_ops, > }; > > static const struct of_device_id ls_pcie_ep_of_match[] = { > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 7ad349c32082..15b8059544e3 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -435,8 +435,7 @@ static void dw_pcie_ep_stop(struct pci_epc *epc) > struct dw_pcie_ep *ep = epc_get_drvdata(epc); > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > - if (pci->ops && pci->ops->stop_link) > - pci->ops->stop_link(pci); > + dw_pcie_stop_link(pci); > } > > static int dw_pcie_ep_start(struct pci_epc *epc) > @@ -444,10 +443,7 @@ static int dw_pcie_ep_start(struct pci_epc *epc) > struct dw_pcie_ep *ep = epc_get_drvdata(epc); > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > - if (!pci->ops || !pci->ops->start_link) > - return -EINVAL; > - > - return pci->ops->start_link(pci); > + return dw_pcie_start_link(pci); > } > > static const struct pci_epc_features* > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index 2f13eec4812d..c49a3bde7a2a 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -409,8 +409,8 @@ int dw_pcie_host_init(struct pcie_port *pp) > > dw_pcie_setup_rc(pp); > > - if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) { > - ret = pci->ops->start_link(pci); > + if (!dw_pcie_link_up(pci)) { > + ret = dw_pcie_start_link(pci); > if (ret) > goto err_free_msi; > } > @@ -427,8 +427,7 @@ int dw_pcie_host_init(struct pcie_port *pp) > return 0; > > err_stop_link: > - if (pci->ops && pci->ops->stop_link) > - pci->ops->stop_link(pci); > + dw_pcie_stop_link(pci); > > err_free_msi: > if (pp->has_msi_ctrl) > @@ -444,8 +443,7 @@ void dw_pcie_host_deinit(struct pcie_port *pp) > pci_stop_root_bus(pp->bridge->bus); > pci_remove_root_bus(pp->bridge->bus); > > - if (pci->ops && pci->ops->stop_link) > - pci->ops->stop_link(pci); > + dw_pcie_stop_link(pci); > > if (pp->has_msi_ctrl) > dw_pcie_free_msi(pp); > diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c > index 0c5de87d3cc6..abf1afac6064 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-plat.c > +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c > @@ -36,15 +36,6 @@ static const struct of_device_id dw_plat_pcie_of_match[]; > static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = { > }; > > -static int dw_plat_pcie_establish_link(struct dw_pcie *pci) > -{ > - return 0; > -} > - > -static const struct dw_pcie_ops dw_pcie_ops = { > - .start_link = dw_plat_pcie_establish_link, > -}; > - > static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep) > { > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > @@ -140,7 +131,6 @@ static int dw_plat_pcie_probe(struct platform_device *pdev) > return -ENOMEM; > > pci->dev = dev; > - pci->ops = &dw_pcie_ops; > > dw_plat_pcie->pci = pci; > dw_plat_pcie->mode = mode; > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 7d6e9b7576be..8ba239292634 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -365,6 +365,20 @@ static inline void dw_pcie_dbi_ro_wr_dis(struct dw_pcie *pci) > dw_pcie_writel_dbi(pci, reg, val); > } > > +static inline int dw_pcie_start_link(struct dw_pcie *pci) > +{ > + if (pci->ops && pci->ops->start_link) > + return pci->ops->start_link(pci); > + > + return 0; > +} > + > +static inline void dw_pcie_stop_link(struct dw_pcie *pci) > +{ > + if (pci->ops && pci->ops->stop_link) > + pci->ops->stop_link(pci); > +} > + > #ifdef CONFIG_PCIE_DW_HOST > irqreturn_t dw_handle_msi_irq(struct pcie_port *pp); > void dw_pcie_setup_rc(struct pcie_port *pp); > -- > 2.35.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC9B6C43334 for ; Tue, 28 Jun 2022 06:44:03 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4LXFS22K8kz3c7h for ; Tue, 28 Jun 2022 16:44:02 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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Mon, 27 Jun 2022 23:43:19 -0700 (PDT) Received: from thinkpad ([27.111.75.159]) by smtp.gmail.com with ESMTPSA id u2-20020a170902714200b0016a522915e5sm8376804plm.83.2022.06.27.23.43.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Jun 2022 23:43:19 -0700 (PDT) Date: Tue, 28 Jun 2022 12:13:13 +0530 From: Manivannan Sadhasivam To: Serge Semin Subject: Re: [PATCH RESEND v5 13/18] PCI: dwc: Add start_link/stop_link inliners Message-ID: <20220628064313.GF23601@thinkpad> References: <20220624143428.8334-1-Sergey.Semin@baikalelectronics.ru> <20220624143428.8334-14-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20220624143428.8334-14-Sergey.Semin@baikalelectronics.ru> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-kernel@lists.infradead.org, Rob Herring , Lorenzo Pieralisi , Roy Zang , linux-pci@vger.kernel.org, Jingoo Han , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , linux-kernel@vger.kernel.org, Serge Semin , Alexey Malahov , Minghuan Lian , Pavel Parkhomenko , Frank Li , Gustavo Pimentel , Bjorn Helgaas , linuxppc-dev@lists.ozlabs.org, Mingkai Hu Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Fri, Jun 24, 2022 at 05:34:23PM +0300, Serge Semin wrote: > There are several places in the generic DW PCIe code where the > platform-specific PCIe link start/stop methods are called after making > sure the ops handler and the callbacks are specified. Instead of repeating > the same pattern over and over let's define the static-inline methods in > the DW PCIe header file and use them in the relevant parts of the driver. > > Note returning a negative error from the EP link start procedure if the > start_link pointer isn't specified doesn't really make much sense since > it's perfectly normal to have such a platform. Moreover even > pci_epc_start() doesn't fail if no epc->ops->start callback is spotted. As > a side-effect of this modification we can set the generic DW PCIe and > Layerscape EP platform drivers free from the empty start_link callbacks > and as such entirely dummy dw_pcie_ops instances. > > Signed-off-by: Serge Semin Reviewed-by: Manivannan Sadhasivam Thanks, Mani > Reviewed-by: Rob Herring > > --- > > Changelog v4: > - This is a new patch created on the v4 lap of the series. > --- > drivers/pci/controller/dwc/pci-layerscape-ep.c | 12 ------------ > drivers/pci/controller/dwc/pcie-designware-ep.c | 8 ++------ > drivers/pci/controller/dwc/pcie-designware-host.c | 10 ++++------ > drivers/pci/controller/dwc/pcie-designware-plat.c | 10 ---------- > drivers/pci/controller/dwc/pcie-designware.h | 14 ++++++++++++++ > 5 files changed, 20 insertions(+), 34 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c > index 39f4664bd84c..ad99707b3b99 100644 > --- a/drivers/pci/controller/dwc/pci-layerscape-ep.c > +++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c > @@ -32,15 +32,6 @@ struct ls_pcie_ep { > const struct ls_pcie_ep_drvdata *drvdata; > }; > > -static int ls_pcie_establish_link(struct dw_pcie *pci) > -{ > - return 0; > -} > - > -static const struct dw_pcie_ops dw_ls_pcie_ep_ops = { > - .start_link = ls_pcie_establish_link, > -}; > - > static const struct pci_epc_features* > ls_pcie_ep_get_features(struct dw_pcie_ep *ep) > { > @@ -106,19 +97,16 @@ static const struct dw_pcie_ep_ops ls_pcie_ep_ops = { > > static const struct ls_pcie_ep_drvdata ls1_ep_drvdata = { > .ops = &ls_pcie_ep_ops, > - .dw_pcie_ops = &dw_ls_pcie_ep_ops, > }; > > static const struct ls_pcie_ep_drvdata ls2_ep_drvdata = { > .func_offset = 0x20000, > .ops = &ls_pcie_ep_ops, > - .dw_pcie_ops = &dw_ls_pcie_ep_ops, > }; > > static const struct ls_pcie_ep_drvdata lx2_ep_drvdata = { > .func_offset = 0x8000, > .ops = &ls_pcie_ep_ops, > - .dw_pcie_ops = &dw_ls_pcie_ep_ops, > }; > > static const struct of_device_id ls_pcie_ep_of_match[] = { > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 7ad349c32082..15b8059544e3 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -435,8 +435,7 @@ static void dw_pcie_ep_stop(struct pci_epc *epc) > struct dw_pcie_ep *ep = epc_get_drvdata(epc); > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > - if (pci->ops && pci->ops->stop_link) > - pci->ops->stop_link(pci); > + dw_pcie_stop_link(pci); > } > > static int dw_pcie_ep_start(struct pci_epc *epc) > @@ -444,10 +443,7 @@ static int dw_pcie_ep_start(struct pci_epc *epc) > struct dw_pcie_ep *ep = epc_get_drvdata(epc); > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > - if (!pci->ops || !pci->ops->start_link) > - return -EINVAL; > - > - return pci->ops->start_link(pci); > + return dw_pcie_start_link(pci); > } > > static const struct pci_epc_features* > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index 2f13eec4812d..c49a3bde7a2a 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -409,8 +409,8 @@ int dw_pcie_host_init(struct pcie_port *pp) > > dw_pcie_setup_rc(pp); > > - if (!dw_pcie_link_up(pci) && pci->ops && pci->ops->start_link) { > - ret = pci->ops->start_link(pci); > + if (!dw_pcie_link_up(pci)) { > + ret = dw_pcie_start_link(pci); > if (ret) > goto err_free_msi; > } > @@ -427,8 +427,7 @@ int dw_pcie_host_init(struct pcie_port *pp) > return 0; > > err_stop_link: > - if (pci->ops && pci->ops->stop_link) > - pci->ops->stop_link(pci); > + dw_pcie_stop_link(pci); > > err_free_msi: > if (pp->has_msi_ctrl) > @@ -444,8 +443,7 @@ void dw_pcie_host_deinit(struct pcie_port *pp) > pci_stop_root_bus(pp->bridge->bus); > pci_remove_root_bus(pp->bridge->bus); > > - if (pci->ops && pci->ops->stop_link) > - pci->ops->stop_link(pci); > + dw_pcie_stop_link(pci); > > if (pp->has_msi_ctrl) > dw_pcie_free_msi(pp); > diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c > index 0c5de87d3cc6..abf1afac6064 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-plat.c > +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c > @@ -36,15 +36,6 @@ static const struct of_device_id dw_plat_pcie_of_match[]; > static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = { > }; > > -static int dw_plat_pcie_establish_link(struct dw_pcie *pci) > -{ > - return 0; > -} > - > -static const struct dw_pcie_ops dw_pcie_ops = { > - .start_link = dw_plat_pcie_establish_link, > -}; > - > static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep) > { > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > @@ -140,7 +131,6 @@ static int dw_plat_pcie_probe(struct platform_device *pdev) > return -ENOMEM; > > pci->dev = dev; > - pci->ops = &dw_pcie_ops; > > dw_plat_pcie->pci = pci; > dw_plat_pcie->mode = mode; > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h > index 7d6e9b7576be..8ba239292634 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -365,6 +365,20 @@ static inline void dw_pcie_dbi_ro_wr_dis(struct dw_pcie *pci) > dw_pcie_writel_dbi(pci, reg, val); > } > > +static inline int dw_pcie_start_link(struct dw_pcie *pci) > +{ > + if (pci->ops && pci->ops->start_link) > + return pci->ops->start_link(pci); > + > + return 0; > +} > + > +static inline void dw_pcie_stop_link(struct dw_pcie *pci) > +{ > + if (pci->ops && pci->ops->stop_link) > + pci->ops->stop_link(pci); > +} > + > #ifdef CONFIG_PCIE_DW_HOST > irqreturn_t dw_handle_msi_irq(struct pcie_port *pp); > void dw_pcie_setup_rc(struct pcie_port *pp); > -- > 2.35.1 > -- மணிவண்ணன் சதாசிவம் From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: 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Parkhomenko , Frank Li , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH RESEND v5 13/18] PCI: dwc: Add start_link/stop_link inliners Message-ID: <20220628064313.GF23601@thinkpad> References: <20220624143428.8334-1-Sergey.Semin@baikalelectronics.ru> <20220624143428.8334-14-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220624143428.8334-14-Sergey.Semin@baikalelectronics.ru> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_234323_400848_6341EA8F X-CRM114-Status: GOOD ( 29.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org T24gRnJpLCBKdW4gMjQsIDIwMjIgYXQgMDU6MzQ6MjNQTSArMDMwMCwgU2VyZ2UgU2VtaW4gd3Jv dGU6Cj4gVGhlcmUgYXJlIHNldmVyYWwgcGxhY2VzIGluIHRoZSBnZW5lcmljIERXIFBDSWUgY29k ZSB3aGVyZSB0aGUKPiBwbGF0Zm9ybS1zcGVjaWZpYyBQQ0llIGxpbmsgc3RhcnQvc3RvcCBtZXRo b2RzIGFyZSBjYWxsZWQgYWZ0ZXIgbWFraW5nCj4gc3VyZSB0aGUgb3BzIGhhbmRsZXIgYW5kIHRo ZSBjYWxsYmFja3MgYXJlIHNwZWNpZmllZC4gSW5zdGVhZCBvZiByZXBlYXRpbmcKPiB0aGUgc2Ft ZSBwYXR0ZXJuIG92ZXIgYW5kIG92ZXIgbGV0J3MgZGVmaW5lIHRoZSBzdGF0aWMtaW5saW5lIG1l dGhvZHMgaW4KPiB0aGUgRFcgUENJZSBoZWFkZXIgZmlsZSBhbmQgdXNlIHRoZW0gaW4gdGhlIHJl bGV2YW50IHBhcnRzIG9mIHRoZSBkcml2ZXIuCj4gCj4gTm90ZSByZXR1cm5pbmcgYSBuZWdhdGl2 ZSBlcnJvciBmcm9tIHRoZSBFUCBsaW5rIHN0YXJ0IHByb2NlZHVyZSBpZiB0aGUKPiBzdGFydF9s aW5rIHBvaW50ZXIgaXNuJ3Qgc3BlY2lmaWVkIGRvZXNuJ3QgcmVhbGx5IG1ha2UgbXVjaCBzZW5z ZSBzaW5jZQo+IGl0J3MgcGVyZmVjdGx5IG5vcm1hbCB0byBoYXZlIHN1Y2ggYSBwbGF0Zm9ybS4g TW9yZW92ZXIgZXZlbgo+IHBjaV9lcGNfc3RhcnQoKSBkb2Vzbid0IGZhaWwgaWYgbm8gZXBjLT5v cHMtPnN0YXJ0IGNhbGxiYWNrIGlzIHNwb3R0ZWQuIEFzCj4gYSBzaWRlLWVmZmVjdCBvZiB0aGlz IG1vZGlmaWNhdGlvbiB3ZSBjYW4gc2V0IHRoZSBnZW5lcmljIERXIFBDSWUgYW5kCj4gTGF5ZXJz Y2FwZSBFUCBwbGF0Zm9ybSBkcml2ZXJzIGZyZWUgZnJvbSB0aGUgZW1wdHkgc3RhcnRfbGluayBj YWxsYmFja3MKPiBhbmQgYXMgc3VjaCBlbnRpcmVseSBkdW1teSBkd19wY2llX29wcyBpbnN0YW5j ZXMuCj4gCj4gU2lnbmVkLW9mZi1ieTogU2VyZ2UgU2VtaW4gPFNlcmdleS5TZW1pbkBiYWlrYWxl bGVjdHJvbmljcy5ydT4KClJldmlld2VkLWJ5OiBNYW5pdmFubmFuIFNhZGhhc2l2YW0gPG1hbml2 YW5uYW4uc2FkaGFzaXZhbUBsaW5hcm8ub3JnPgoKVGhhbmtzLApNYW5pCgo+IFJldmlld2VkLWJ5 OiBSb2IgSGVycmluZyA8cm9iaEBrZXJuZWwub3JnPgo+IAo+IC0tLQo+IAo+IENoYW5nZWxvZyB2 NDoKPiAtIFRoaXMgaXMgYSBuZXcgcGF0Y2ggY3JlYXRlZCBvbiB0aGUgdjQgbGFwIG9mIHRoZSBz ZXJpZXMuCj4gLS0tCj4gIGRyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1sYXllcnNjYXBl LWVwLmMgICAgfCAxMiAtLS0tLS0tLS0tLS0KPiAgZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2Mv cGNpZS1kZXNpZ253YXJlLWVwLmMgICB8ICA4ICsrLS0tLS0tCj4gIGRyaXZlcnMvcGNpL2NvbnRy b2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS1ob3N0LmMgfCAxMCArKysrLS0tLS0tCj4gIGRyaXZl cnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS1wbGF0LmMgfCAxMCAtLS0tLS0t LS0tCj4gIGRyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS5oICAgICAg fCAxNCArKysrKysrKysrKysrKwo+ICA1IGZpbGVzIGNoYW5nZWQsIDIwIGluc2VydGlvbnMoKyks IDM0IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9jb250cm9sbGVy L2R3Yy9wY2ktbGF5ZXJzY2FwZS1lcC5jIGIvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNp LWxheWVyc2NhcGUtZXAuYwo+IGluZGV4IDM5ZjQ2NjRiZDg0Yy4uYWQ5OTcwN2IzYjk5IDEwMDY0 NAo+IC0tLSBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaS1sYXllcnNjYXBlLWVwLmMK PiArKysgYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2ktbGF5ZXJzY2FwZS1lcC5jCj4g QEAgLTMyLDE1ICszMiw2IEBAIHN0cnVjdCBsc19wY2llX2VwIHsKPiAgCWNvbnN0IHN0cnVjdCBs c19wY2llX2VwX2RydmRhdGEgKmRydmRhdGE7Cj4gIH07Cj4gIAo+IC1zdGF0aWMgaW50IGxzX3Bj aWVfZXN0YWJsaXNoX2xpbmsoc3RydWN0IGR3X3BjaWUgKnBjaSkKPiAtewo+IC0JcmV0dXJuIDA7 Cj4gLX0KPiAtCj4gLXN0YXRpYyBjb25zdCBzdHJ1Y3QgZHdfcGNpZV9vcHMgZHdfbHNfcGNpZV9l cF9vcHMgPSB7Cj4gLQkuc3RhcnRfbGluayA9IGxzX3BjaWVfZXN0YWJsaXNoX2xpbmssCj4gLX07 Cj4gLQo+ICBzdGF0aWMgY29uc3Qgc3RydWN0IHBjaV9lcGNfZmVhdHVyZXMqCj4gIGxzX3BjaWVf ZXBfZ2V0X2ZlYXR1cmVzKHN0cnVjdCBkd19wY2llX2VwICplcCkKPiAgewo+IEBAIC0xMDYsMTkg Kzk3LDE2IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZHdfcGNpZV9lcF9vcHMgbHNfcGNpZV9lcF9v cHMgPSB7Cj4gIAo+ICBzdGF0aWMgY29uc3Qgc3RydWN0IGxzX3BjaWVfZXBfZHJ2ZGF0YSBsczFf ZXBfZHJ2ZGF0YSA9IHsKPiAgCS5vcHMgPSAmbHNfcGNpZV9lcF9vcHMsCj4gLQkuZHdfcGNpZV9v cHMgPSAmZHdfbHNfcGNpZV9lcF9vcHMsCj4gIH07Cj4gIAo+ICBzdGF0aWMgY29uc3Qgc3RydWN0 IGxzX3BjaWVfZXBfZHJ2ZGF0YSBsczJfZXBfZHJ2ZGF0YSA9IHsKPiAgCS5mdW5jX29mZnNldCA9 IDB4MjAwMDAsCj4gIAkub3BzID0gJmxzX3BjaWVfZXBfb3BzLAo+IC0JLmR3X3BjaWVfb3BzID0g JmR3X2xzX3BjaWVfZXBfb3BzLAo+ICB9Owo+ICAKPiAgc3RhdGljIGNvbnN0IHN0cnVjdCBsc19w Y2llX2VwX2RydmRhdGEgbHgyX2VwX2RydmRhdGEgPSB7Cj4gIAkuZnVuY19vZmZzZXQgPSAweDgw MDAsCj4gIAkub3BzID0gJmxzX3BjaWVfZXBfb3BzLAo+IC0JLmR3X3BjaWVfb3BzID0gJmR3X2xz X3BjaWVfZXBfb3BzLAo+ICB9Owo+ICAKPiAgc3RhdGljIGNvbnN0IHN0cnVjdCBvZl9kZXZpY2Vf aWQgbHNfcGNpZV9lcF9vZl9tYXRjaFtdID0gewo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9j b250cm9sbGVyL2R3Yy9wY2llLWRlc2lnbndhcmUtZXAuYyBiL2RyaXZlcnMvcGNpL2NvbnRyb2xs ZXIvZHdjL3BjaWUtZGVzaWdud2FyZS1lcC5jCj4gaW5kZXggN2FkMzQ5YzMyMDgyLi4xNWI4MDU5 NTQ0ZTMgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNp Z253YXJlLWVwLmMKPiArKysgYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2llLWRlc2ln bndhcmUtZXAuYwo+IEBAIC00MzUsOCArNDM1LDcgQEAgc3RhdGljIHZvaWQgZHdfcGNpZV9lcF9z dG9wKHN0cnVjdCBwY2lfZXBjICplcGMpCj4gIAlzdHJ1Y3QgZHdfcGNpZV9lcCAqZXAgPSBlcGNf Z2V0X2RydmRhdGEoZXBjKTsKPiAgCXN0cnVjdCBkd19wY2llICpwY2kgPSB0b19kd19wY2llX2Zy b21fZXAoZXApOwo+ICAKPiAtCWlmIChwY2ktPm9wcyAmJiBwY2ktPm9wcy0+c3RvcF9saW5rKQo+ IC0JCXBjaS0+b3BzLT5zdG9wX2xpbmsocGNpKTsKPiArCWR3X3BjaWVfc3RvcF9saW5rKHBjaSk7 Cj4gIH0KPiAgCj4gIHN0YXRpYyBpbnQgZHdfcGNpZV9lcF9zdGFydChzdHJ1Y3QgcGNpX2VwYyAq ZXBjKQo+IEBAIC00NDQsMTAgKzQ0Myw3IEBAIHN0YXRpYyBpbnQgZHdfcGNpZV9lcF9zdGFydChz dHJ1Y3QgcGNpX2VwYyAqZXBjKQo+ICAJc3RydWN0IGR3X3BjaWVfZXAgKmVwID0gZXBjX2dldF9k cnZkYXRhKGVwYyk7Cj4gIAlzdHJ1Y3QgZHdfcGNpZSAqcGNpID0gdG9fZHdfcGNpZV9mcm9tX2Vw KGVwKTsKPiAgCj4gLQlpZiAoIXBjaS0+b3BzIHx8ICFwY2ktPm9wcy0+c3RhcnRfbGluaykKPiAt CQlyZXR1cm4gLUVJTlZBTDsKPiAtCj4gLQlyZXR1cm4gcGNpLT5vcHMtPnN0YXJ0X2xpbmsocGNp KTsKPiArCXJldHVybiBkd19wY2llX3N0YXJ0X2xpbmsocGNpKTsKPiAgfQo+ICAKPiAgc3RhdGlj IGNvbnN0IHN0cnVjdCBwY2lfZXBjX2ZlYXR1cmVzKgo+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3Bj aS9jb250cm9sbGVyL2R3Yy9wY2llLWRlc2lnbndhcmUtaG9zdC5jIGIvZHJpdmVycy9wY2kvY29u dHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLWhvc3QuYwo+IGluZGV4IDJmMTNlZWM0ODEyZC4u YzQ5YTNiZGU3YTJhIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3Bj aWUtZGVzaWdud2FyZS1ob3N0LmMKPiArKysgYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9w Y2llLWRlc2lnbndhcmUtaG9zdC5jCj4gQEAgLTQwOSw4ICs0MDksOCBAQCBpbnQgZHdfcGNpZV9o b3N0X2luaXQoc3RydWN0IHBjaWVfcG9ydCAqcHApCj4gIAo+ICAJZHdfcGNpZV9zZXR1cF9yYyhw cCk7Cj4gIAo+IC0JaWYgKCFkd19wY2llX2xpbmtfdXAocGNpKSAmJiBwY2ktPm9wcyAmJiBwY2kt Pm9wcy0+c3RhcnRfbGluaykgewo+IC0JCXJldCA9IHBjaS0+b3BzLT5zdGFydF9saW5rKHBjaSk7 Cj4gKwlpZiAoIWR3X3BjaWVfbGlua191cChwY2kpKSB7Cj4gKwkJcmV0ID0gZHdfcGNpZV9zdGFy dF9saW5rKHBjaSk7Cj4gIAkJaWYgKHJldCkKPiAgCQkJZ290byBlcnJfZnJlZV9tc2k7Cj4gIAl9 Cj4gQEAgLTQyNyw4ICs0MjcsNyBAQCBpbnQgZHdfcGNpZV9ob3N0X2luaXQoc3RydWN0IHBjaWVf cG9ydCAqcHApCj4gIAlyZXR1cm4gMDsKPiAgCj4gIGVycl9zdG9wX2xpbms6Cj4gLQlpZiAocGNp LT5vcHMgJiYgcGNpLT5vcHMtPnN0b3BfbGluaykKPiAtCQlwY2ktPm9wcy0+c3RvcF9saW5rKHBj aSk7Cj4gKwlkd19wY2llX3N0b3BfbGluayhwY2kpOwo+ICAKPiAgZXJyX2ZyZWVfbXNpOgo+ICAJ aWYgKHBwLT5oYXNfbXNpX2N0cmwpCj4gQEAgLTQ0NCw4ICs0NDMsNyBAQCB2b2lkIGR3X3BjaWVf aG9zdF9kZWluaXQoc3RydWN0IHBjaWVfcG9ydCAqcHApCj4gIAlwY2lfc3RvcF9yb290X2J1cyhw cC0+YnJpZGdlLT5idXMpOwo+ICAJcGNpX3JlbW92ZV9yb290X2J1cyhwcC0+YnJpZGdlLT5idXMp Owo+ICAKPiAtCWlmIChwY2ktPm9wcyAmJiBwY2ktPm9wcy0+c3RvcF9saW5rKQo+IC0JCXBjaS0+ b3BzLT5zdG9wX2xpbmsocGNpKTsKPiArCWR3X3BjaWVfc3RvcF9saW5rKHBjaSk7Cj4gIAo+ICAJ aWYgKHBwLT5oYXNfbXNpX2N0cmwpCj4gIAkJZHdfcGNpZV9mcmVlX21zaShwcCk7Cj4gZGlmZiAt LWdpdCBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS1wbGF0LmMg Yi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9wY2llLWRlc2lnbndhcmUtcGxhdC5jCj4gaW5k ZXggMGM1ZGU4N2QzY2M2Li5hYmYxYWZhYzYwNjQgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9wY2kv Y29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLXBsYXQuYwo+ICsrKyBiL2RyaXZlcnMvcGNp L2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS1wbGF0LmMKPiBAQCAtMzYsMTUgKzM2LDYg QEAgc3RhdGljIGNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQgZHdfcGxhdF9wY2llX29mX21hdGNo W107Cj4gIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZHdfcGNpZV9ob3N0X29wcyBkd19wbGF0X3BjaWVf aG9zdF9vcHMgPSB7Cj4gIH07Cj4gIAo+IC1zdGF0aWMgaW50IGR3X3BsYXRfcGNpZV9lc3RhYmxp c2hfbGluayhzdHJ1Y3QgZHdfcGNpZSAqcGNpKQo+IC17Cj4gLQlyZXR1cm4gMDsKPiAtfQo+IC0K PiAtc3RhdGljIGNvbnN0IHN0cnVjdCBkd19wY2llX29wcyBkd19wY2llX29wcyA9IHsKPiAtCS5z dGFydF9saW5rID0gZHdfcGxhdF9wY2llX2VzdGFibGlzaF9saW5rLAo+IC19Owo+IC0KPiAgc3Rh dGljIHZvaWQgZHdfcGxhdF9wY2llX2VwX2luaXQoc3RydWN0IGR3X3BjaWVfZXAgKmVwKQo+ICB7 Cj4gIAlzdHJ1Y3QgZHdfcGNpZSAqcGNpID0gdG9fZHdfcGNpZV9mcm9tX2VwKGVwKTsKPiBAQCAt MTQwLDcgKzEzMSw2IEBAIHN0YXRpYyBpbnQgZHdfcGxhdF9wY2llX3Byb2JlKHN0cnVjdCBwbGF0 Zm9ybV9kZXZpY2UgKnBkZXYpCj4gIAkJcmV0dXJuIC1FTk9NRU07Cj4gIAo+ICAJcGNpLT5kZXYg PSBkZXY7Cj4gLQlwY2ktPm9wcyA9ICZkd19wY2llX29wczsKPiAgCj4gIAlkd19wbGF0X3BjaWUt PnBjaSA9IHBjaTsKPiAgCWR3X3BsYXRfcGNpZS0+bW9kZSA9IG1vZGU7Cj4gZGlmZiAtLWdpdCBh L2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUtZGVzaWdud2FyZS5oIGIvZHJpdmVycy9w Y2kvY29udHJvbGxlci9kd2MvcGNpZS1kZXNpZ253YXJlLmgKPiBpbmRleCA3ZDZlOWI3NTc2YmUu LjhiYTIzOTI5MjYzNCAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL2R3Yy9w Y2llLWRlc2lnbndhcmUuaAo+ICsrKyBiL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvZHdjL3BjaWUt ZGVzaWdud2FyZS5oCj4gQEAgLTM2NSw2ICszNjUsMjAgQEAgc3RhdGljIGlubGluZSB2b2lkIGR3 X3BjaWVfZGJpX3JvX3dyX2RpcyhzdHJ1Y3QgZHdfcGNpZSAqcGNpKQo+ICAJZHdfcGNpZV93cml0 ZWxfZGJpKHBjaSwgcmVnLCB2YWwpOwo+ICB9Cj4gIAo+ICtzdGF0aWMgaW5saW5lIGludCBkd19w Y2llX3N0YXJ0X2xpbmsoc3RydWN0IGR3X3BjaWUgKnBjaSkKPiArewo+ICsJaWYgKHBjaS0+b3Bz ICYmIHBjaS0+b3BzLT5zdGFydF9saW5rKQo+ICsJCXJldHVybiBwY2ktPm9wcy0+c3RhcnRfbGlu ayhwY2kpOwo+ICsKPiArCXJldHVybiAwOwo+ICt9Cj4gKwo+ICtzdGF0aWMgaW5saW5lIHZvaWQg ZHdfcGNpZV9zdG9wX2xpbmsoc3RydWN0IGR3X3BjaWUgKnBjaSkKPiArewo+ICsJaWYgKHBjaS0+ b3BzICYmIHBjaS0+b3BzLT5zdG9wX2xpbmspCj4gKwkJcGNpLT5vcHMtPnN0b3BfbGluayhwY2kp Owo+ICt9Cj4gKwo+ICAjaWZkZWYgQ09ORklHX1BDSUVfRFdfSE9TVAo+ICBpcnFyZXR1cm5fdCBk d19oYW5kbGVfbXNpX2lycShzdHJ1Y3QgcGNpZV9wb3J0ICpwcCk7Cj4gIHZvaWQgZHdfcGNpZV9z ZXR1cF9yYyhzdHJ1Y3QgcGNpZV9wb3J0ICpwcCk7Cj4gLS0gCj4gMi4zNS4xCj4gCgotLSAK4K6u 4K6j4K6/4K614K6j4K+N4K6j4K6p4K+NIOCumuCupOCuvuCumuCuv+CuteCuruCvjQoKX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5l bCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6 Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=