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[65.184.195.139]) by smtp.gmail.com with ESMTPSA id bl34-20020a05620a1aa200b006af34a1a897sm4315729qkb.65.2022.06.28.07.52.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jun 2022 07:52:25 -0700 (PDT) Date: Tue, 28 Jun 2022 10:52:23 -0400 From: Tom Rini To: Pali =?iso-8859-1?Q?Roh=E1r?= Cc: "Priyanka Jain (OSS)" , "Peng Fan (OSS)" , Qiang Zhao , Shengzhou Liu , Alexander Graf , Bin Meng , Wolfgang Denk , Sinan Akman , u-boot@lists.denx.de Subject: Re: [PATCH v3] powerpc: mpc85xx: Set TEXT_BASE addresses to real base values Message-ID: <20220628145223.GK1146598@bill-the-cat> References: <4fea4901-2d25-b867-617b-e03c152cffce@oss.nxp.com> <20220616121944.7841-1-pali@kernel.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="jITzwD3HDGXid3BE" Content-Disposition: inline In-Reply-To: <20220616121944.7841-1-pali@kernel.org> X-Clacks-Overhead: GNU Terry Pratchett X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean --jITzwD3HDGXid3BE Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Jun 16, 2022 at 02:19:44PM +0200, Pali Roh=E1r wrote: > Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are > manually increased by 0x1000 due to .bootpg section. This section has size > of 0x1000 bytes and is manually put by linker script before .text section > (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is > set. Due to this fact lot of other config options are manually increased = by > 0x1000 value to make correct layout. Note that entry point is not on > CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address > CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image). >=20 > Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is > set. Put .bootpg code directly into .text section and move text base > address to the start of .bootpg code. And finally remove +0x1000 value fr= om > lot of config options. With this removal custom PHDRS is not used anymore, > so remove it too. >=20 > After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at > address -0x1000 anymore. >=20 > Tested on P2020 board with SPL and proper U-Boot. >=20 > Signed-off-by: Pali Roh=E1r Applied to u-boot/next, thanks! --=20 Tom --jITzwD3HDGXid3BE Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmK7FaQACgkQFHw5/5Y0 tyyprgv+K7+ETMwIrfHmFh2KsId5h6qufbo6LN4CmpY5UmqHsiORF9OMhSN6yurG h/TTttsi/4Ah5e1m305DKbFcAa5LdCZyCPRcwC5+Jfd3OElzahaL+42Kzcp10WMI JHyiwI7XelFKkXDSvM8L/c0wxvyLm8awVNoylClDK6ayIJM1RW3TPlIP712OOyVe 8H5j1WFWHjw7Z1RJH0BavhlennFVh9NeWUvfBm2KvIJO5Ul7Yh5M5GcDe+JES60h Kf+lby5t69CSJt6EtSokkE0s/pJ9x1HqyAk7hgqaB4Rk2gvjcOkzKcSA1al7PrOi nrt382ZNNu64yMgdSALTXPj53cHfvGd5KpkiIh844ioy6aDx3vmTP+JPqkS6RX2n GaVlG7TFQd+kxd5aVzhQCtq3QGIeeEHHedDO6PFpbZUDhzoxbvE6LdPu7VHiK+Qr nFq+jStMfF8P3wRHzdryaE65fN5VILI+G20qab7S73grCzDYoOS31fRB9hwCD7Xb JZN2lFEl =IYmk -----END PGP SIGNATURE----- --jITzwD3HDGXid3BE--