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Mon, 4 Jul 2022 17:55:10 -0400 (EDT) From: Peter Delevoryas To: Cc: Peter Delevoryas , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Peter Maydell , Andrew Jeffery , Joel Stanley , qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 8/8] aspeed: Add AST1030 (BIC) to fby35 Date: Mon, 4 Jul 2022 14:54:57 -0700 Message-Id: <20220704215457.38332-8-peter@pjd.dev> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220704215457.38332-1-peter@pjd.dev> References: <20220704215457.38332-1-peter@pjd.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=66.111.4.224; envelope-from=peter@pjd.dev; helo=new2-smtp.messagingengine.com X-Spam_score_int: -12 X-Spam_score: -1.3 X-Spam_bar: - X-Spam_report: (-1.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FROM_FMBLA_NEWDOM=1.498, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+alex.bennee=linaro.org@nongnu.org Sender: "Qemu-devel" X-TUID: EwyOe0iRf458 With the BIC, the easiest way to run everything is to create two pty's for each SoC and reserve stdin/stdout for the monitor: wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf qemu-system-arm -machine fby35 \ -drive file=fby35.mtd,format=raw,if=mtd \ -device loader,file=fby35.mtd,addr=0,cpu-num=0 \ -serial pty -serial pty -serial mon:stdio -display none -S screen /dev/ttys0 screen /dev/ttys1 (qemu) c Signed-off-by: Peter Delevoryas --- hw/arm/fby35.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) diff --git a/hw/arm/fby35.c b/hw/arm/fby35.c index d3edfa3b10..031602800f 100644 --- a/hw/arm/fby35.c +++ b/hw/arm/fby35.c @@ -11,7 +11,9 @@ #include "sysemu/sysemu.h" #include "sysemu/block-backend.h" #include "hw/boards.h" +#include "hw/qdev-clock.h" #include "hw/arm/aspeed_soc.h" +#include "hw/arm/boot.h" #define TYPE_FBY35 MACHINE_TYPE_NAME("fby35") OBJECT_DECLARE_SIMPLE_TYPE(Fby35State, FBY35); @@ -22,8 +24,11 @@ struct Fby35State { MemoryRegion bmc_memory; MemoryRegion bmc_dram; MemoryRegion bmc_boot_rom; + MemoryRegion bic_memory; + Clock *bic_sysclk; AspeedSoCState bmc; + AspeedSoCState bic; bool mmio_exec; }; @@ -110,11 +115,31 @@ static void fby35_bmc_init(Fby35State *s) } } +static void fby35_bic_init(Fby35State *s) +{ + s->bic_sysclk = clock_new(OBJECT(s), "SYSCLK"); + clock_set_hz(s->bic_sysclk, 200000000ULL); + + memory_region_init(&s->bic_memory, OBJECT(s), "bic-memory", UINT64_MAX); + + object_initialize_child(OBJECT(s), "bic", &s->bic, "ast1030-a1"); + qdev_connect_clock_in(DEVICE(&s->bic), "sysclk", s->bic_sysclk); + object_property_set_link(OBJECT(&s->bic), "memory", OBJECT(&s->bic_memory), + &error_abort); + aspeed_soc_uart_set_chr(&s->bic, ASPEED_DEV_UART5, serial_hd(1)); + qdev_realize(DEVICE(&s->bic), NULL, &error_abort); + + aspeed_board_init_flashes(&s->bic.fmc, "sst25vf032b", 2, 2); + aspeed_board_init_flashes(&s->bic.spi[0], "sst25vf032b", 2, 4); + aspeed_board_init_flashes(&s->bic.spi[1], "sst25vf032b", 2, 6); +} + static void fby35_init(MachineState *machine) { Fby35State *s = FBY35(machine); fby35_bmc_init(s); + fby35_bic_init(s); } @@ -141,7 +166,7 @@ static void fby35_class_init(ObjectClass *oc, void *data) mc->init = fby35_init; mc->no_floppy = 1; mc->no_cdrom = 1; - mc->min_cpus = mc->max_cpus = mc->default_cpus = 2; + mc->min_cpus = mc->max_cpus = mc->default_cpus = 3; object_class_property_add_bool(oc, "execute-in-place", fby35_get_mmio_exec, -- 2.37.0