From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 737F2C43334 for ; Tue, 5 Jul 2022 19:24:13 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id CE1FC164F; Tue, 5 Jul 2022 21:23:20 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz CE1FC164F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1657049050; bh=aKh11eT849o9eiym54eIKb7E6EpfGMkrjWJIf8RaClc=; h=Date:From:To:Subject:References:In-Reply-To:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=jIoP1ubgwtl2IYNKrNyOV4fHEd0MYC3ySUTx8oH+GtfUjVBcxY6sHMRUB2+omKbbC OV3o8ItTjDdhTxdMQMDl2MuulodEuntfImALMEPFp6XtK2edirgqsXyXaTXNc2T60w SoWcSwMFk7oNLDzyl6GtKMk3TGeX/cwiDqG6P7t8= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 53F7DF8015B; Tue, 5 Jul 2022 21:23:20 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id D7188F8015B; Tue, 5 Jul 2022 21:23:18 +0200 (CEST) Received: from mail-io1-f43.google.com (mail-io1-f43.google.com [209.85.166.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id C2E98F80104 for ; Tue, 5 Jul 2022 21:23:12 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz C2E98F80104 Received: by mail-io1-f43.google.com with SMTP id p69so12056219iod.10 for ; Tue, 05 Jul 2022 12:23:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=H5eyFsH62ZCOMR5j44c7qDXl+L0Xiqo5oRXL7/M/n9U=; b=Ls6AnGbn47YanEhAeJr7Ehd3G+XYjYN76GB9j6KiBUgOEK40N/QUWTI0FakAL5fZ8T n3enAmlpcYEObvan//p1RUJ+o93+jvakwD7Wiw8mzI4C7nBH8rf032VIeqHOZwkOvblT VB1UuePCLSlDZqDPCdfFMAr914lBhgNlu+zFv5fdxx9vnhV3sVuqlPb1J2vHH2yrVgAR mAkRv8igVhXsCidIFmY4n842KEKKK97sWcLeVGgijzGsVpXSpjmbU8eH8X4VjV6vOzMk JbLIiN47LtI+FqwaYhd7VhQPnUT+RYJKGkT4MVqhzZ09evpJtfKwBEQHfG3oiLsAZpLr OcCg== X-Gm-Message-State: AJIora+FJS1dwrReBoxTWx6SUWlA3QbWA+HHi/Jx09C72nCaAFU8p1Le GpuNcaMQK1VB10mP2q317w== X-Google-Smtp-Source: AGRyM1u0fHCnFee1kEPRUg0SqoCFPI8COBha8zPrSVGZ62b76/VvOoRH5cPG5r4Gv3xkb5zkrF1YIg== X-Received: by 2002:a05:6638:3014:b0:317:9daf:c42c with SMTP id r20-20020a056638301400b003179dafc42cmr22147925jak.10.1657048990513; Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id c1-20020a6bfd01000000b00675139dbff9sm14725537ioi.48.2022.07.05.12.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: (nullmailer pid 2477219 invoked by uid 1000); Tue, 05 Jul 2022 19:23:07 -0000 Date: Tue, 5 Jul 2022 13:23:07 -0600 From: Rob Herring To: Conor Dooley Subject: Re: [PATCH v4 05/14] dt-bindings: memory-controllers: add canaan k210 sram controller Message-ID: <20220705192307.GA2471961-robh@kernel.org> References: <20220701192300.2293643-1-conor@kernel.org> <20220701192300.2293643-6-conor@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220701192300.2293643-6-conor@kernel.org> Cc: Niklas Cassel , alsa-devel@alsa-project.org, David Airlie , Palmer Dabbelt , linux-kernel@vger.kernel.org, Conor Dooley , Thierry Reding , Krzysztof Kozlowski , linux-riscv@lists.infradead.org, Sam Ravnborg , Damien Le Moal , Daniel Lezcano , Jose Abreu , Geert Uytterhoeven , Eugeniy Paltsev , devicetree@vger.kernel.org, Albert Ou , Mark Brown , dri-devel@lists.freedesktop.org, Paul Walmsley , Dillon Min , Liam Girdwood , Serge Semin , Vinod Koul , Palmer Dabbelt , Daniel Vetter , dmaengine@vger.kernel.org, Masahiro Yamada X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Fri, Jul 01, 2022 at 08:22:51PM +0100, Conor Dooley wrote: > From: Conor Dooley > > The k210 U-Boot port has been using the clocks defined in the > devicetree to bring up the board's SRAM, but this violates the > dt-schema. As such, move the clocks to a dedicated node with > the same compatible string & document it. > > Signed-off-by: Conor Dooley > --- > .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > new file mode 100644 > index 000000000000..82be32757713 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Canaan K210 SRAM memory controller > + > +description: | Don't need '|'. > + The Canaan K210 SRAM memory controller is initialised and programmed by > + firmware, but an OS might want to read its registers for error reporting > + purposes and to learn about the DRAM topology. How the OS going to do that? You don't have any way defined to access the registers. Also, where is the SRAM address itself defined? > + > +maintainers: > + - Conor Dooley > + > +properties: > + compatible: > + enum: > + - canaan,k210-sram > + > + clocks: > + minItems: 1 > + items: > + - description: sram0 clock > + - description: sram1 clock > + - description: aisram clock > + > + clock-names: > + minItems: 1 > + items: > + - const: sram0 > + - const: sram1 > + - const: aisram > + > +required: > + - compatible > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include > + memory-controller { > + compatible = "canaan,k210-sram"; > + clocks = <&sysclk K210_CLK_SRAM0>, > + <&sysclk K210_CLK_SRAM1>, > + <&sysclk K210_CLK_AI>; > + clock-names = "sram0", "sram1", "aisram"; > + }; > -- > 2.37.0 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25FEEC433EF for ; Tue, 5 Jul 2022 19:23:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229821AbiGETXN (ORCPT ); Tue, 5 Jul 2022 15:23:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229762AbiGETXM (ORCPT ); Tue, 5 Jul 2022 15:23:12 -0400 Received: from mail-io1-f54.google.com (mail-io1-f54.google.com [209.85.166.54]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5567D21835; Tue, 5 Jul 2022 12:23:11 -0700 (PDT) Received: by mail-io1-f54.google.com with SMTP id z191so12073155iof.6; Tue, 05 Jul 2022 12:23:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=H5eyFsH62ZCOMR5j44c7qDXl+L0Xiqo5oRXL7/M/n9U=; b=jqPCqs1xAayb9f2/qRAD01d6yorVOORpJVhGyri1td7hztkeRQRUEH+8wAS/k+iUQ8 eAUl9SA1ZIPJdNPasHM0apZkarLadz+MXU69Ufi80k9qZejAyqNBFXLG4ODoeKHLcL7t EuNqJ6/xEVysv/amtKOal88TCHs3695ZZEEq2/tTxFpFYAgaIuWDxm7M+8oJwWk/lkwm 6GG2BgBbqBfyTUOwiRpyPvL335ap/IgGXIdQ7BWBxZkz2by2pK8OtmaX3Yd2RthNGLKF 3V7N8MONracVn1C0TQeEHlTOGO/u3Mu4agg7VzzuppY1UsBTMLZBS/TDDjK6oFHe91Zb 0Utw== X-Gm-Message-State: AJIora+pTVBPSepMtXrHTM9AMReHMEcQIV0rM3pObrbnl4XSBhwfwoML cU/EGsN5L/g42G2iS1YeLA== X-Google-Smtp-Source: AGRyM1u0fHCnFee1kEPRUg0SqoCFPI8COBha8zPrSVGZ62b76/VvOoRH5cPG5r4Gv3xkb5zkrF1YIg== X-Received: by 2002:a05:6638:3014:b0:317:9daf:c42c with SMTP id r20-20020a056638301400b003179dafc42cmr22147925jak.10.1657048990513; Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id c1-20020a6bfd01000000b00675139dbff9sm14725537ioi.48.2022.07.05.12.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: (nullmailer pid 2477219 invoked by uid 1000); Tue, 05 Jul 2022 19:23:07 -0000 Date: Tue, 5 Jul 2022 13:23:07 -0600 From: Rob Herring To: Conor Dooley Cc: David Airlie , Daniel Vetter , Krzysztof Kozlowski , Thierry Reding , Sam Ravnborg , Eugeniy Paltsev , Vinod Koul , Liam Girdwood , Mark Brown , Serge Semin , Daniel Lezcano , Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Conor Dooley , Masahiro Yamada , Damien Le Moal , Geert Uytterhoeven , Niklas Cassel , Dillon Min , Jose Abreu , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, alsa-devel@alsa-project.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v4 05/14] dt-bindings: memory-controllers: add canaan k210 sram controller Message-ID: <20220705192307.GA2471961-robh@kernel.org> References: <20220701192300.2293643-1-conor@kernel.org> <20220701192300.2293643-6-conor@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220701192300.2293643-6-conor@kernel.org> Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org On Fri, Jul 01, 2022 at 08:22:51PM +0100, Conor Dooley wrote: > From: Conor Dooley > > The k210 U-Boot port has been using the clocks defined in the > devicetree to bring up the board's SRAM, but this violates the > dt-schema. As such, move the clocks to a dedicated node with > the same compatible string & document it. > > Signed-off-by: Conor Dooley > --- > .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > new file mode 100644 > index 000000000000..82be32757713 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Canaan K210 SRAM memory controller > + > +description: | Don't need '|'. > + The Canaan K210 SRAM memory controller is initialised and programmed by > + firmware, but an OS might want to read its registers for error reporting > + purposes and to learn about the DRAM topology. How the OS going to do that? You don't have any way defined to access the registers. Also, where is the SRAM address itself defined? > + > +maintainers: > + - Conor Dooley > + > +properties: > + compatible: > + enum: > + - canaan,k210-sram > + > + clocks: > + minItems: 1 > + items: > + - description: sram0 clock > + - description: sram1 clock > + - description: aisram clock > + > + clock-names: > + minItems: 1 > + items: > + - const: sram0 > + - const: sram1 > + - const: aisram > + > +required: > + - compatible > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include > + memory-controller { > + compatible = "canaan,k210-sram"; > + clocks = <&sysclk K210_CLK_SRAM0>, > + <&sysclk K210_CLK_SRAM1>, > + <&sysclk K210_CLK_AI>; > + clock-names = "sram0", "sram1", "aisram"; > + }; > -- > 2.37.0 > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 168B3C43334 for ; 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Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id c1-20020a6bfd01000000b00675139dbff9sm14725537ioi.48.2022.07.05.12.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: (nullmailer pid 2477219 invoked by uid 1000); Tue, 05 Jul 2022 19:23:07 -0000 Date: Tue, 5 Jul 2022 13:23:07 -0600 From: Rob Herring To: Conor Dooley Cc: David Airlie , Daniel Vetter , Krzysztof Kozlowski , Thierry Reding , Sam Ravnborg , Eugeniy Paltsev , Vinod Koul , Liam Girdwood , Mark Brown , Serge Semin , Daniel Lezcano , Palmer Dabbelt , Palmer Dabbelt , Paul Walmsley , Albert Ou , Conor Dooley , Masahiro Yamada , Damien Le Moal , Geert Uytterhoeven , Niklas Cassel , Dillon Min , Jose Abreu , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, alsa-devel@alsa-project.org, linux-riscv@lists.infradead.org Subject: Re: [PATCH v4 05/14] dt-bindings: memory-controllers: add canaan k210 sram controller Message-ID: <20220705192307.GA2471961-robh@kernel.org> References: <20220701192300.2293643-1-conor@kernel.org> <20220701192300.2293643-6-conor@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20220701192300.2293643-6-conor@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220705_122312_733438_F3C07ABE X-CRM114-Status: GOOD ( 21.55 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Fri, Jul 01, 2022 at 08:22:51PM +0100, Conor Dooley wrote: > From: Conor Dooley > > The k210 U-Boot port has been using the clocks defined in the > devicetree to bring up the board's SRAM, but this violates the > dt-schema. As such, move the clocks to a dedicated node with > the same compatible string & document it. > > Signed-off-by: Conor Dooley > --- > .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > new file mode 100644 > index 000000000000..82be32757713 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Canaan K210 SRAM memory controller > + > +description: | Don't need '|'. > + The Canaan K210 SRAM memory controller is initialised and programmed by > + firmware, but an OS might want to read its registers for error reporting > + purposes and to learn about the DRAM topology. How the OS going to do that? You don't have any way defined to access the registers. Also, where is the SRAM address itself defined? > + > +maintainers: > + - Conor Dooley > + > +properties: > + compatible: > + enum: > + - canaan,k210-sram > + > + clocks: > + minItems: 1 > + items: > + - description: sram0 clock > + - description: sram1 clock > + - description: aisram clock > + > + clock-names: > + minItems: 1 > + items: > + - const: sram0 > + - const: sram1 > + - const: aisram > + > +required: > + - compatible > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include > + memory-controller { > + compatible = "canaan,k210-sram"; > + clocks = <&sysclk K210_CLK_SRAM0>, > + <&sysclk K210_CLK_SRAM1>, > + <&sysclk K210_CLK_AI>; > + clock-names = "sram0", "sram1", "aisram"; > + }; > -- > 2.37.0 > > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E45F3C43334 for ; Tue, 5 Jul 2022 19:23:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B11B18B4F7; Tue, 5 Jul 2022 19:23:12 +0000 (UTC) Received: from mail-io1-f50.google.com (mail-io1-f50.google.com [209.85.166.50]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6407F8B4E8 for ; Tue, 5 Jul 2022 19:23:11 +0000 (UTC) Received: by mail-io1-f50.google.com with SMTP id n7so1510645ioo.7 for ; Tue, 05 Jul 2022 12:23:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=H5eyFsH62ZCOMR5j44c7qDXl+L0Xiqo5oRXL7/M/n9U=; b=y+bkYk7ucbwp/fN4xwQiSv4uN+9fj+1bmf7rmehfUKm8vXNT32rgAJMIwylY0VWITd GMR0ZffBD+qH1ht7wMZS3X1x40APMqPjwgcbHpaAjj/RLKQIMULwv7ggtL73MhWvOcra b7/YN/HREvrKzjAHPvXU+70iIQPPZ6QY/Cr2D+cUOGcvoC+IcMykPfmYyywJwgZHhtJS uvfALMdY3MATNeBgPQI+tEVSSmokD/D4/hUGYaOUlQdP6295WHl+Z2v6otKK1RVDOmNG S+b+8AdQjpdJPQzGzVnkB29OpDqsp5YaohlAxcpx5lTqsSYX5WLl9MXbZ/8OxAQzhGek ZoGQ== X-Gm-Message-State: AJIora8rn/90kyrU+nwOuL9qMMg3MrPMuAjLv219AdjiHHvDYbvQDbSa 1205NiY37FnMJrmLdU6N2A== X-Google-Smtp-Source: AGRyM1u0fHCnFee1kEPRUg0SqoCFPI8COBha8zPrSVGZ62b76/VvOoRH5cPG5r4Gv3xkb5zkrF1YIg== X-Received: by 2002:a05:6638:3014:b0:317:9daf:c42c with SMTP id r20-20020a056638301400b003179dafc42cmr22147925jak.10.1657048990513; Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: from robh.at.kernel.org ([64.188.179.248]) by smtp.gmail.com with ESMTPSA id c1-20020a6bfd01000000b00675139dbff9sm14725537ioi.48.2022.07.05.12.23.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 12:23:10 -0700 (PDT) Received: (nullmailer pid 2477219 invoked by uid 1000); Tue, 05 Jul 2022 19:23:07 -0000 Date: Tue, 5 Jul 2022 13:23:07 -0600 From: Rob Herring To: Conor Dooley Subject: Re: [PATCH v4 05/14] dt-bindings: memory-controllers: add canaan k210 sram controller Message-ID: <20220705192307.GA2471961-robh@kernel.org> References: <20220701192300.2293643-1-conor@kernel.org> <20220701192300.2293643-6-conor@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220701192300.2293643-6-conor@kernel.org> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Niklas Cassel , alsa-devel@alsa-project.org, David Airlie , Palmer Dabbelt , linux-kernel@vger.kernel.org, Conor Dooley , Thierry Reding , Krzysztof Kozlowski , linux-riscv@lists.infradead.org, Sam Ravnborg , Damien Le Moal , Daniel Lezcano , Jose Abreu , Geert Uytterhoeven , Eugeniy Paltsev , devicetree@vger.kernel.org, Albert Ou , Mark Brown , dri-devel@lists.freedesktop.org, Paul Walmsley , Dillon Min , Liam Girdwood , Serge Semin , Vinod Koul , Palmer Dabbelt , dmaengine@vger.kernel.org, Masahiro Yamada Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Fri, Jul 01, 2022 at 08:22:51PM +0100, Conor Dooley wrote: > From: Conor Dooley > > The k210 U-Boot port has been using the clocks defined in the > devicetree to bring up the board's SRAM, but this violates the > dt-schema. As such, move the clocks to a dedicated node with > the same compatible string & document it. > > Signed-off-by: Conor Dooley > --- > .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > new file mode 100644 > index 000000000000..82be32757713 > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Canaan K210 SRAM memory controller > + > +description: | Don't need '|'. > + The Canaan K210 SRAM memory controller is initialised and programmed by > + firmware, but an OS might want to read its registers for error reporting > + purposes and to learn about the DRAM topology. How the OS going to do that? You don't have any way defined to access the registers. Also, where is the SRAM address itself defined? > + > +maintainers: > + - Conor Dooley > + > +properties: > + compatible: > + enum: > + - canaan,k210-sram > + > + clocks: > + minItems: 1 > + items: > + - description: sram0 clock > + - description: sram1 clock > + - description: aisram clock > + > + clock-names: > + minItems: 1 > + items: > + - const: sram0 > + - const: sram1 > + - const: aisram > + > +required: > + - compatible > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + #include > + memory-controller { > + compatible = "canaan,k210-sram"; > + clocks = <&sysclk K210_CLK_SRAM0>, > + <&sysclk K210_CLK_SRAM1>, > + <&sysclk K210_CLK_AI>; > + clock-names = "sram0", "sram1", "aisram"; > + }; > -- > 2.37.0 > >