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From: Daniel Henrique Barboza <danielhb413@gmail.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, danielhb413@gmail.com,
	peter.maydell@linaro.org, richard.henderson@linaro.org,
	"Cédric Le Goater" <clg@kaod.org>,
	"Frederic Barrat" <fbarrat@linux.ibm.com>
Subject: [PULL 03/34] ppc/pnv: assign pnv-phb-root-port chassis/slot earlier
Date: Wed,  6 Jul 2022 17:09:15 -0300	[thread overview]
Message-ID: <20220706200946.471114-4-danielhb413@gmail.com> (raw)
In-Reply-To: <20220706200946.471114-1-danielhb413@gmail.com>

It is not advisable to execute an object_dynamic_cast() to poke into
bus->qbus.parent and follow it up with a C cast into the PnvPHB type we
think we got.

In fact this is not needed. There is nothing sophisticated being done
with the PHB object retrieved during root_port_realize() for both PHB3
and PHB4. We're retrieving a PHB reference just to access phb->chip_id
and phb->phb_id and use them to define the chassis/slot of the root
port.

phb->phb_id is already being passed to pnv_phb_attach_root_port() via
the 'index' parameter. Let's also add a 'chip_id' parameter to this
function and assign chassis and slot right there. This will spare us
from the hassle of accessing the PHB object inside realize().

Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220621173436.165912-4-danielhb413@gmail.com>
---
 hw/pci-host/pnv_phb3.c | 18 ++----------------
 hw/pci-host/pnv_phb4.c | 18 ++----------------
 hw/ppc/pnv.c           | 15 +++++++++++++--
 include/hw/ppc/pnv.h   |  3 ++-
 4 files changed, 19 insertions(+), 35 deletions(-)

diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 4ba660f8b9..afe5698167 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -1052,7 +1052,8 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp)
 
     pci_setup_iommu(pci->bus, pnv_phb3_dma_iommu, phb);
 
-    pnv_phb_attach_root_port(pci, TYPE_PNV_PHB3_ROOT_PORT, phb->phb_id);
+    pnv_phb_attach_root_port(pci, TYPE_PNV_PHB3_ROOT_PORT,
+                             phb->phb_id, phb->chip_id);
 }
 
 void pnv_phb3_update_regions(PnvPHB3 *phb)
@@ -1139,23 +1140,8 @@ static void pnv_phb3_root_port_realize(DeviceState *dev, Error **errp)
 {
     PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
     PCIDevice *pci = PCI_DEVICE(dev);
-    PCIBus *bus = pci_get_bus(pci);
-    PnvPHB3 *phb = NULL;
     Error *local_err = NULL;
 
-    phb = (PnvPHB3 *) object_dynamic_cast(OBJECT(bus->qbus.parent),
-                                          TYPE_PNV_PHB3);
-
-    if (!phb) {
-        error_setg(errp,
-"pnv_phb3_root_port devices must be connected to pnv-phb3 buses");
-        return;
-    }
-
-    /* Set unique chassis/slot values for the root port */
-    qdev_prop_set_uint8(&pci->qdev, "chassis", phb->chip_id);
-    qdev_prop_set_uint16(&pci->qdev, "slot", phb->phb_id);
-
     rpc->parent_realize(dev, &local_err);
     if (local_err) {
         error_propagate(errp, local_err);
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index ffd9d8a947..725b3d740b 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1585,7 +1585,8 @@ static void pnv_phb4_realize(DeviceState *dev, Error **errp)
     pci->bus->flags |= PCI_BUS_EXTENDED_CONFIG_SPACE;
 
     /* Add a single Root port if running with defaults */
-    pnv_phb_attach_root_port(pci, pecc->rp_model, phb->phb_id);
+    pnv_phb_attach_root_port(pci, pecc->rp_model,
+                             phb->phb_id, phb->chip_id);
 
     /* Setup XIVE Source */
     if (phb->big_phb) {
@@ -1781,23 +1782,8 @@ static void pnv_phb4_root_port_reset(DeviceState *dev)
 static void pnv_phb4_root_port_realize(DeviceState *dev, Error **errp)
 {
     PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev);
-    PCIDevice *pci = PCI_DEVICE(dev);
-    PCIBus *bus = pci_get_bus(pci);
-    PnvPHB4 *phb = NULL;
     Error *local_err = NULL;
 
-    phb = (PnvPHB4 *) object_dynamic_cast(OBJECT(bus->qbus.parent),
-                                          TYPE_PNV_PHB4);
-
-    if (!phb) {
-        error_setg(errp, "%s must be connected to pnv-phb4 buses", dev->id);
-        return;
-    }
-
-    /* Set unique chassis/slot values for the root port */
-    qdev_prop_set_uint8(&pci->qdev, "chassis", phb->chip_id);
-    qdev_prop_set_uint16(&pci->qdev, "slot", phb->phb_id);
-
     rpc->parent_realize(dev, &local_err);
     if (local_err) {
         error_propagate(errp, local_err);
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 40e0cbd84d..c5e63bede7 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1189,8 +1189,15 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
     }
 }
 
-/* Attach a root port device */
-void pnv_phb_attach_root_port(PCIHostState *pci, const char *name, int index)
+/*
+ * Attach a root port device.
+ *
+ * 'index' will be used both as a PCIE slot value and to calculate
+ * QOM id. 'chip_id' is going to be used as PCIE chassis for the
+ * root port.
+ */
+void pnv_phb_attach_root_port(PCIHostState *pci, const char *name,
+                              int index, int chip_id)
 {
     PCIDevice *root = pci_new(PCI_DEVFN(0, 0), name);
     g_autofree char *default_id = g_strdup_printf("%s[%d]", name, index);
@@ -1199,6 +1206,10 @@ void pnv_phb_attach_root_port(PCIHostState *pci, const char *name, int index)
     object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id,
                               OBJECT(root));
 
+    /* Set unique chassis/slot values for the root port */
+    qdev_prop_set_uint8(DEVICE(root), "chassis", chip_id);
+    qdev_prop_set_uint16(DEVICE(root), "slot", index);
+
     pci_realize_and_unref(root, pci->bus, &error_fatal);
 }
 
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 033890a23f..b991194223 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -189,7 +189,8 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
                          TYPE_PNV_CHIP_POWER10)
 
 PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
-void pnv_phb_attach_root_port(PCIHostState *pci, const char *name, int index);
+void pnv_phb_attach_root_port(PCIHostState *pci, const char *name,
+                              int index, int chip_id);
 
 #define TYPE_PNV_MACHINE       MACHINE_TYPE_NAME("powernv")
 typedef struct PnvMachineClass PnvMachineClass;
-- 
2.36.1



  parent reply	other threads:[~2022-07-06 20:22 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-06 20:09 [PULL 00/34] ppc queue Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 01/34] ppc/pnv: move root port attach to pnv_phb4_realize() Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 02/34] ppc/pnv: attach phb3/phb4 root ports in QOM tree Daniel Henrique Barboza
2022-07-06 20:09 ` Daniel Henrique Barboza [this message]
2022-07-06 20:09 ` [PULL 04/34] ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 05/34] ppc/pnv: make pnv_ics_resend() use chip8->phbs[] Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 06/34] ppc/pnv: make pnv_chip_power8_pic_print_info() " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 07/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 08/34] ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 09/34] target/ppc: Change FPSCR_* to follow POWER ISA numbering convention Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 10/34] spapr/ddw: Reset DMA when the last non-default window is removed Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 11/34] spapr/ddw: Implement 64bit query extension Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 12/34] target/ppc: use int128.h methods in vpmsumd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 13/34] target/ppc: use int128.h methods in vadduqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 14/34] target/ppc: use int128.h methods in vaddecuq and vaddeuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 15/34] target/ppc: use int128.h methods in vaddcuq Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 16/34] target/ppc: use int128.h methods in vsubuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 17/34] target/ppc: use int128.h methods in vsubecuq and vsubeuqm Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 18/34] target/ppc: use int128.h methods in vsubcuq Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 19/34] ppc: Define SETFIELD for the ppc target Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 20/34] ppc/spapr: Implement H_WATCHDOG Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 21/34] target/ppc: Fix insn32.decode style issues Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 22/34] target/ppc: Move mffscrn[i] to decodetree Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 23/34] target/ppc: Move mffsce " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 24/34] target/ppc: Move mffsl " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 25/34] target/ppc: Move mffs[.] " Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 26/34] target/ppc: Implement mffscdrn[i] instructions Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 27/34] tests/tcg/ppc64: Add mffsce test Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 28/34] target/ppc: Add flag for ISA v2.06 BCDA instructions Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 29/34] target/ppc: implement addg6s Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 30/34] target/ppc: implement cbcdtd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 31/34] target/ppc: implement cdtbcd Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 32/34] target/ppc: Return default CPU for max CPU Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 33/34] target/ppc/cpu-models: Remove the "default" CPU alias Daniel Henrique Barboza
2022-07-06 20:09 ` [PULL 34/34] target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 Daniel Henrique Barboza
2022-07-07  2:24 ` [PULL 00/34] ppc queue Richard Henderson

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