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Add definitions for PCIe legacy INTx interrupts Date: Tue, 12 Jul 2022 18:41:05 +0200 Message-Id: <20220712164108.30262-8-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220712164108.30262-1-kabel@kernel.org> References: <20220712164108.30262-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220712_094133_098073_590717C7 X-CRM114-Status: GOOD ( 14.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RnJvbTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KCkFkZCBkZWZpbml0aW9ucyBmb3Ig UENJZSBsZWdhY3kgSU5UeCBpbnRlcnJ1cHRzLgoKVGhpcyBpcyByZXF1aXJlZCBmb3IgZXhhbXBs ZSBpbiBhIHNjZW5hcmlvIHdoZXJlIGEgZHJpdmVyIHJlcXVlc3RzIG9ubHkKb25lIG9mIHRoZSBs ZWdhY3kgaW50ZXJydXB0cyAoSU5UQSkuIFdpdGhvdXQgdGhpcywgdGhlIGRyaXZlciB3b3VsZCBi ZQpub3RpZmllZCBvbiBldmVudHMgb24gYWxsIDQgKElOVEEsIElOVEIsIElOVEMsIElOVEQpLCBl dmVuIGlmIGl0CnJlcXVlc3RlZCBvbmx5IG9uZSBvZiB0aGVtLgoKU2lnbmVkLW9mZi1ieTogUGFs aSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KU2lnbmVkLW9mZi1ieTogTWFyZWsgQmVow7puIDxr YWJlbEBrZXJuZWwub3JnPgotLS0KIGFyY2gvYXJtL2Jvb3QvZHRzL2FybWFkYS14cC1tdjc4NDYw LmR0c2kgfCAxNDAgKysrKysrKysrKysrKysrKysrKy0tLS0KIDEgZmlsZSBjaGFuZ2VkLCAxMjAg aW5zZXJ0aW9ucygrKSwgMjAgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vYm9v dC9kdHMvYXJtYWRhLXhwLW12Nzg0NjAuZHRzaSBiL2FyY2gvYXJtL2Jvb3QvZHRzL2FybWFkYS14 cC1tdjc4NDYwLmR0c2kKaW5kZXggMjMwYTNmZDM2YjMwLi4xNjE4NWVkZjlhYTUgMTAwNjQ0Ci0t LSBhL2FyY2gvYXJtL2Jvb3QvZHRzL2FybWFkYS14cC1tdjc4NDYwLmR0c2kKKysrIGIvYXJjaC9h cm0vYm9vdC9kdHMvYXJtYWRhLXhwLW12Nzg0NjAuZHRzaQpAQCAtMTE5LDE2ICsxMTksMjYgQEAg cGNpZTE6IHBjaWVAMSwwIHsKIAkJCQlyZWcgPSA8MHgwODAwIDAgMCAwIDA+OwogCQkJCSNhZGRy ZXNzLWNlbGxzID0gPDM+OwogCQkJCSNzaXplLWNlbGxzID0gPDI+OworCQkJCWludGVycnVwdC1u YW1lcyA9ICJpbnR4IjsKKwkJCQlpbnRlcnJ1cHRzLWV4dGVuZGVkID0gPCZtcGljIDU4PjsKIAkJ CQkjaW50ZXJydXB0LWNlbGxzID0gPDE+OwogCQkJCXJhbmdlcyA9IDwweDgyMDAwMDAwIDAgMCAw eDgyMDAwMDAwIDB4MSAwIDEgMAogCQkJCQkgIDB4ODEwMDAwMDAgMCAwIDB4ODEwMDAwMDAgMHgx IDAgMSAwPjsKIAkJCQlidXMtcmFuZ2UgPSA8MHgwMCAweGZmPjsKLQkJCQlpbnRlcnJ1cHQtbWFw LW1hc2sgPSA8MCAwIDAgMD47Ci0JCQkJaW50ZXJydXB0LW1hcCA9IDwwIDAgMCAwICZtcGljIDU4 PjsKKwkJCQlpbnRlcnJ1cHQtbWFwLW1hc2sgPSA8MCAwIDAgNz47CisJCQkJaW50ZXJydXB0LW1h cCA9IDwwIDAgMCAxICZwY2llMV9pbnRjIDA+LAorCQkJCQkJPDAgMCAwIDIgJnBjaWUxX2ludGMg MT4sCisJCQkJCQk8MCAwIDAgMyAmcGNpZTFfaW50YyAyPiwKKwkJCQkJCTwwIDAgMCA0ICZwY2ll MV9pbnRjIDM+OwogCQkJCW1hcnZlbGwscGNpZS1wb3J0ID0gPDA+OwogCQkJCW1hcnZlbGwscGNp ZS1sYW5lID0gPDA+OwogCQkJCWNsb2NrcyA9IDwmZ2F0ZWNsayA1PjsKIAkJCQlzdGF0dXMgPSAi ZGlzYWJsZWQiOworCisJCQkJcGNpZTFfaW50YzogaW50ZXJydXB0LWNvbnRyb2xsZXIgeworCQkJ CQlpbnRlcnJ1cHQtY29udHJvbGxlcjsKKwkJCQkJI2ludGVycnVwdC1jZWxscyA9IDwxPjsKKwkJ CQl9OwogCQkJfTsKIAogCQkJcGNpZTI6IHBjaWVAMiwwIHsKQEAgLTEzNywxNiArMTQ3LDI2IEBA IHBjaWUyOiBwY2llQDIsMCB7CiAJCQkJcmVnID0gPDB4MTAwMCAwIDAgMCAwPjsKIAkJCQkjYWRk cmVzcy1jZWxscyA9IDwzPjsKIAkJCQkjc2l6ZS1jZWxscyA9IDwyPjsKKwkJCQlpbnRlcnJ1cHQt bmFtZXMgPSAiaW50eCI7CisJCQkJaW50ZXJydXB0cy1leHRlbmRlZCA9IDwmbXBpYyA1OT47CiAJ CQkJI2ludGVycnVwdC1jZWxscyA9IDwxPjsKIAkJCQlyYW5nZXMgPSA8MHg4MjAwMDAwMCAwIDAg MHg4MjAwMDAwMCAweDIgMCAxIDAKIAkJCQkJICAweDgxMDAwMDAwIDAgMCAweDgxMDAwMDAwIDB4 MiAwIDEgMD47CiAJCQkJYnVzLXJhbmdlID0gPDB4MDAgMHhmZj47Ci0JCQkJaW50ZXJydXB0LW1h cC1tYXNrID0gPDAgMCAwIDA+OwotCQkJCWludGVycnVwdC1tYXAgPSA8MCAwIDAgMCAmbXBpYyA1 OT47CisJCQkJaW50ZXJydXB0LW1hcC1tYXNrID0gPDAgMCAwIDc+OworCQkJCWludGVycnVwdC1t YXAgPSA8MCAwIDAgMSAmcGNpZTJfaW50YyAwPiwKKwkJCQkJCTwwIDAgMCAyICZwY2llMl9pbnRj IDE+LAorCQkJCQkJPDAgMCAwIDMgJnBjaWUyX2ludGMgMj4sCisJCQkJCQk8MCAwIDAgNCAmcGNp ZTJfaW50YyAzPjsKIAkJCQltYXJ2ZWxsLHBjaWUtcG9ydCA9IDwwPjsKIAkJCQltYXJ2ZWxsLHBj aWUtbGFuZSA9IDwxPjsKIAkJCQljbG9ja3MgPSA8JmdhdGVjbGsgNj47CiAJCQkJc3RhdHVzID0g ImRpc2FibGVkIjsKKworCQkJCXBjaWUyX2ludGM6IGludGVycnVwdC1jb250cm9sbGVyIHsKKwkJ CQkJaW50ZXJydXB0LWNvbnRyb2xsZXI7CisJCQkJCSNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47CisJ CQkJfTsKIAkJCX07CiAKIAkJCXBjaWUzOiBwY2llQDMsMCB7CkBAIC0xNTUsMTYgKzE3NSwyNiBA QCBwY2llMzogcGNpZUAzLDAgewogCQkJCXJlZyA9IDwweDE4MDAgMCAwIDAgMD47CiAJCQkJI2Fk ZHJlc3MtY2VsbHMgPSA8Mz47CiAJCQkJI3NpemUtY2VsbHMgPSA8Mj47CisJCQkJaW50ZXJydXB0 LW5hbWVzID0gImludHgiOworCQkJCWludGVycnVwdHMtZXh0ZW5kZWQgPSA8Jm1waWMgNjA+Owog CQkJCSNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47CiAJCQkJcmFuZ2VzID0gPDB4ODIwMDAwMDAgMCAw IDB4ODIwMDAwMDAgMHgzIDAgMSAwCiAJCQkJCSAgMHg4MTAwMDAwMCAwIDAgMHg4MTAwMDAwMCAw eDMgMCAxIDA+OwogCQkJCWJ1cy1yYW5nZSA9IDwweDAwIDB4ZmY+OwotCQkJCWludGVycnVwdC1t YXAtbWFzayA9IDwwIDAgMCAwPjsKLQkJCQlpbnRlcnJ1cHQtbWFwID0gPDAgMCAwIDAgJm1waWMg NjA+OworCQkJCWludGVycnVwdC1tYXAtbWFzayA9IDwwIDAgMCA3PjsKKwkJCQlpbnRlcnJ1cHQt bWFwID0gPDAgMCAwIDEgJnBjaWUzX2ludGMgMD4sCisJCQkJCQk8MCAwIDAgMiAmcGNpZTNfaW50 YyAxPiwKKwkJCQkJCTwwIDAgMCAzICZwY2llM19pbnRjIDI+LAorCQkJCQkJPDAgMCAwIDQgJnBj aWUzX2ludGMgMz47CiAJCQkJbWFydmVsbCxwY2llLXBvcnQgPSA8MD47CiAJCQkJbWFydmVsbCxw Y2llLWxhbmUgPSA8Mj47CiAJCQkJY2xvY2tzID0gPCZnYXRlY2xrIDc+OwogCQkJCXN0YXR1cyA9 ICJkaXNhYmxlZCI7CisKKwkJCQlwY2llM19pbnRjOiBpbnRlcnJ1cHQtY29udHJvbGxlciB7CisJ CQkJCWludGVycnVwdC1jb250cm9sbGVyOworCQkJCQkjaW50ZXJydXB0LWNlbGxzID0gPDE+Owor CQkJCX07CiAJCQl9OwogCiAJCQlwY2llNDogcGNpZUA0LDAgewpAQCAtMTczLDE2ICsyMDMsMjYg QEAgcGNpZTQ6IHBjaWVANCwwIHsKIAkJCQlyZWcgPSA8MHgyMDAwIDAgMCAwIDA+OwogCQkJCSNh ZGRyZXNzLWNlbGxzID0gPDM+OwogCQkJCSNzaXplLWNlbGxzID0gPDI+OworCQkJCWludGVycnVw dC1uYW1lcyA9ICJpbnR4IjsKKwkJCQlpbnRlcnJ1cHRzLWV4dGVuZGVkID0gPCZtcGljIDYxPjsK IAkJCQkjaW50ZXJydXB0LWNlbGxzID0gPDE+OwogCQkJCXJhbmdlcyA9IDwweDgyMDAwMDAwIDAg MCAweDgyMDAwMDAwIDB4NCAwIDEgMAogCQkJCQkgIDB4ODEwMDAwMDAgMCAwIDB4ODEwMDAwMDAg MHg0IDAgMSAwPjsKIAkJCQlidXMtcmFuZ2UgPSA8MHgwMCAweGZmPjsKLQkJCQlpbnRlcnJ1cHQt bWFwLW1hc2sgPSA8MCAwIDAgMD47Ci0JCQkJaW50ZXJydXB0LW1hcCA9IDwwIDAgMCAwICZtcGlj IDYxPjsKKwkJCQlpbnRlcnJ1cHQtbWFwLW1hc2sgPSA8MCAwIDAgNz47CisJCQkJaW50ZXJydXB0 LW1hcCA9IDwwIDAgMCAxICZwY2llNF9pbnRjIDA+LAorCQkJCQkJPDAgMCAwIDIgJnBjaWU0X2lu dGMgMT4sCisJCQkJCQk8MCAwIDAgMyAmcGNpZTRfaW50YyAyPiwKKwkJCQkJCTwwIDAgMCA0ICZw Y2llNF9pbnRjIDM+OwogCQkJCW1hcnZlbGwscGNpZS1wb3J0ID0gPDA+OwogCQkJCW1hcnZlbGws cGNpZS1sYW5lID0gPDM+OwogCQkJCWNsb2NrcyA9IDwmZ2F0ZWNsayA4PjsKIAkJCQlzdGF0dXMg PSAiZGlzYWJsZWQiOworCisJCQkJcGNpZTRfaW50YzogaW50ZXJydXB0LWNvbnRyb2xsZXIgewor CQkJCQlpbnRlcnJ1cHQtY29udHJvbGxlcjsKKwkJCQkJI2ludGVycnVwdC1jZWxscyA9IDwxPjsK KwkJCQl9OwogCQkJfTsKIAogCQkJcGNpZTU6IHBjaWVANSwwIHsKQEAgLTE5MSwxNiArMjMxLDI2 IEBAIHBjaWU1OiBwY2llQDUsMCB7CiAJCQkJcmVnID0gPDB4MjgwMCAwIDAgMCAwPjsKIAkJCQkj YWRkcmVzcy1jZWxscyA9IDwzPjsKIAkJCQkjc2l6ZS1jZWxscyA9IDwyPjsKKwkJCQlpbnRlcnJ1 cHQtbmFtZXMgPSAiaW50eCI7CisJCQkJaW50ZXJydXB0cy1leHRlbmRlZCA9IDwmbXBpYyA2Mj47 CiAJCQkJI2ludGVycnVwdC1jZWxscyA9IDwxPjsKIAkJCQlyYW5nZXMgPSA8MHg4MjAwMDAwMCAw IDAgMHg4MjAwMDAwMCAweDUgMCAxIDAKIAkJCQkJICAweDgxMDAwMDAwIDAgMCAweDgxMDAwMDAw IDB4NSAwIDEgMD47CiAJCQkJYnVzLXJhbmdlID0gPDB4MDAgMHhmZj47Ci0JCQkJaW50ZXJydXB0 LW1hcC1tYXNrID0gPDAgMCAwIDA+OwotCQkJCWludGVycnVwdC1tYXAgPSA8MCAwIDAgMCAmbXBp YyA2Mj47CisJCQkJaW50ZXJydXB0LW1hcC1tYXNrID0gPDAgMCAwIDc+OworCQkJCWludGVycnVw dC1tYXAgPSA8MCAwIDAgMSAmcGNpZTVfaW50YyAwPiwKKwkJCQkJCTwwIDAgMCAyICZwY2llNV9p bnRjIDE+LAorCQkJCQkJPDAgMCAwIDMgJnBjaWU1X2ludGMgMj4sCisJCQkJCQk8MCAwIDAgNCAm cGNpZTVfaW50YyAzPjsKIAkJCQltYXJ2ZWxsLHBjaWUtcG9ydCA9IDwxPjsKIAkJCQltYXJ2ZWxs LHBjaWUtbGFuZSA9IDwwPjsKIAkJCQljbG9ja3MgPSA8JmdhdGVjbGsgOT47CiAJCQkJc3RhdHVz ID0gImRpc2FibGVkIjsKKworCQkJCXBjaWU1X2ludGM6IGludGVycnVwdC1jb250cm9sbGVyIHsK KwkJCQkJaW50ZXJydXB0LWNvbnRyb2xsZXI7CisJCQkJCSNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47 CisJCQkJfTsKIAkJCX07CiAKIAkJCXBjaWU2OiBwY2llQDYsMCB7CkBAIC0yMDksMTYgKzI1OSwy NiBAQCBwY2llNjogcGNpZUA2LDAgewogCQkJCXJlZyA9IDwweDMwMDAgMCAwIDAgMD47CiAJCQkJ I2FkZHJlc3MtY2VsbHMgPSA8Mz47CiAJCQkJI3NpemUtY2VsbHMgPSA8Mj47CisJCQkJaW50ZXJy dXB0LW5hbWVzID0gImludHgiOworCQkJCWludGVycnVwdHMtZXh0ZW5kZWQgPSA8Jm1waWMgNjM+ OwogCQkJCSNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47CiAJCQkJcmFuZ2VzID0gPDB4ODIwMDAwMDAg MCAwIDB4ODIwMDAwMDAgMHg2IDAgMSAwCiAJCQkJCSAgMHg4MTAwMDAwMCAwIDAgMHg4MTAwMDAw MCAweDYgMCAxIDA+OwogCQkJCWJ1cy1yYW5nZSA9IDwweDAwIDB4ZmY+OwotCQkJCWludGVycnVw dC1tYXAtbWFzayA9IDwwIDAgMCAwPjsKLQkJCQlpbnRlcnJ1cHQtbWFwID0gPDAgMCAwIDAgJm1w aWMgNjM+OworCQkJCWludGVycnVwdC1tYXAtbWFzayA9IDwwIDAgMCA3PjsKKwkJCQlpbnRlcnJ1 cHQtbWFwID0gPDAgMCAwIDEgJnBjaWU2X2ludGMgMD4sCisJCQkJCQk8MCAwIDAgMiAmcGNpZTZf aW50YyAxPiwKKwkJCQkJCTwwIDAgMCAzICZwY2llNl9pbnRjIDI+LAorCQkJCQkJPDAgMCAwIDQg JnBjaWU2X2ludGMgMz47CiAJCQkJbWFydmVsbCxwY2llLXBvcnQgPSA8MT47CiAJCQkJbWFydmVs bCxwY2llLWxhbmUgPSA8MT47CiAJCQkJY2xvY2tzID0gPCZnYXRlY2xrIDEwPjsKIAkJCQlzdGF0 dXMgPSAiZGlzYWJsZWQiOworCisJCQkJcGNpZTZfaW50YzogaW50ZXJydXB0LWNvbnRyb2xsZXIg eworCQkJCQlpbnRlcnJ1cHQtY29udHJvbGxlcjsKKwkJCQkJI2ludGVycnVwdC1jZWxscyA9IDwx PjsKKwkJCQl9OwogCQkJfTsKIAogCQkJcGNpZTc6IHBjaWVANywwIHsKQEAgLTIyNywxNiArMjg3 LDI2IEBAIHBjaWU3OiBwY2llQDcsMCB7CiAJCQkJcmVnID0gPDB4MzgwMCAwIDAgMCAwPjsKIAkJ CQkjYWRkcmVzcy1jZWxscyA9IDwzPjsKIAkJCQkjc2l6ZS1jZWxscyA9IDwyPjsKKwkJCQlpbnRl cnJ1cHQtbmFtZXMgPSAiaW50eCI7CisJCQkJaW50ZXJydXB0cy1leHRlbmRlZCA9IDwmbXBpYyA2 ND47CiAJCQkJI2ludGVycnVwdC1jZWxscyA9IDwxPjsKIAkJCQlyYW5nZXMgPSA8MHg4MjAwMDAw MCAwIDAgMHg4MjAwMDAwMCAweDcgMCAxIDAKIAkJCQkJICAweDgxMDAwMDAwIDAgMCAweDgxMDAw MDAwIDB4NyAwIDEgMD47CiAJCQkJYnVzLXJhbmdlID0gPDB4MDAgMHhmZj47Ci0JCQkJaW50ZXJy dXB0LW1hcC1tYXNrID0gPDAgMCAwIDA+OwotCQkJCWludGVycnVwdC1tYXAgPSA8MCAwIDAgMCAm bXBpYyA2ND47CisJCQkJaW50ZXJydXB0LW1hcC1tYXNrID0gPDAgMCAwIDc+OworCQkJCWludGVy cnVwdC1tYXAgPSA8MCAwIDAgMSAmcGNpZTdfaW50YyAwPiwKKwkJCQkJCTwwIDAgMCAyICZwY2ll N19pbnRjIDE+LAorCQkJCQkJPDAgMCAwIDMgJnBjaWU3X2ludGMgMj4sCisJCQkJCQk8MCAwIDAg NCAmcGNpZTdfaW50YyAzPjsKIAkJCQltYXJ2ZWxsLHBjaWUtcG9ydCA9IDwxPjsKIAkJCQltYXJ2 ZWxsLHBjaWUtbGFuZSA9IDwyPjsKIAkJCQljbG9ja3MgPSA8JmdhdGVjbGsgMTE+OwogCQkJCXN0 YXR1cyA9ICJkaXNhYmxlZCI7CisKKwkJCQlwY2llN19pbnRjOiBpbnRlcnJ1cHQtY29udHJvbGxl ciB7CisJCQkJCWludGVycnVwdC1jb250cm9sbGVyOworCQkJCQkjaW50ZXJydXB0LWNlbGxzID0g PDE+OworCQkJCX07CiAJCQl9OwogCiAJCQlwY2llODogcGNpZUA4LDAgewpAQCAtMjQ1LDE2ICsz MTUsMjYgQEAgcGNpZTg6IHBjaWVAOCwwIHsKIAkJCQlyZWcgPSA8MHg0MDAwIDAgMCAwIDA+Owog CQkJCSNhZGRyZXNzLWNlbGxzID0gPDM+OwogCQkJCSNzaXplLWNlbGxzID0gPDI+OworCQkJCWlu dGVycnVwdC1uYW1lcyA9ICJpbnR4IjsKKwkJCQlpbnRlcnJ1cHRzLWV4dGVuZGVkID0gPCZtcGlj IDY1PjsKIAkJCQkjaW50ZXJydXB0LWNlbGxzID0gPDE+OwogCQkJCXJhbmdlcyA9IDwweDgyMDAw MDAwIDAgMCAweDgyMDAwMDAwIDB4OCAwIDEgMAogCQkJCQkgIDB4ODEwMDAwMDAgMCAwIDB4ODEw MDAwMDAgMHg4IDAgMSAwPjsKIAkJCQlidXMtcmFuZ2UgPSA8MHgwMCAweGZmPjsKLQkJCQlpbnRl cnJ1cHQtbWFwLW1hc2sgPSA8MCAwIDAgMD47Ci0JCQkJaW50ZXJydXB0LW1hcCA9IDwwIDAgMCAw ICZtcGljIDY1PjsKKwkJCQlpbnRlcnJ1cHQtbWFwLW1hc2sgPSA8MCAwIDAgNz47CisJCQkJaW50 ZXJydXB0LW1hcCA9IDwwIDAgMCAxICZwY2llOF9pbnRjIDA+LAorCQkJCQkJPDAgMCAwIDIgJnBj aWU4X2ludGMgMT4sCisJCQkJCQk8MCAwIDAgMyAmcGNpZThfaW50YyAyPiwKKwkJCQkJCTwwIDAg MCA0ICZwY2llOF9pbnRjIDM+OwogCQkJCW1hcnZlbGwscGNpZS1wb3J0ID0gPDE+OwogCQkJCW1h cnZlbGwscGNpZS1sYW5lID0gPDM+OwogCQkJCWNsb2NrcyA9IDwmZ2F0ZWNsayAxMj47CiAJCQkJ c3RhdHVzID0gImRpc2FibGVkIjsKKworCQkJCXBjaWU4X2ludGM6IGludGVycnVwdC1jb250cm9s bGVyIHsKKwkJCQkJaW50ZXJydXB0LWNvbnRyb2xsZXI7CisJCQkJCSNpbnRlcnJ1cHQtY2VsbHMg PSA8MT47CisJCQkJfTsKIAkJCX07CiAKIAkJCXBjaWU5OiBwY2llQDksMCB7CkBAIC0yNjMsMTYg KzM0MywyNiBAQCBwY2llOTogcGNpZUA5LDAgewogCQkJCXJlZyA9IDwweDQ4MDAgMCAwIDAgMD47 CiAJCQkJI2FkZHJlc3MtY2VsbHMgPSA8Mz47CiAJCQkJI3NpemUtY2VsbHMgPSA8Mj47CisJCQkJ aW50ZXJydXB0LW5hbWVzID0gImludHgiOworCQkJCWludGVycnVwdHMtZXh0ZW5kZWQgPSA8Jm1w aWMgOTk+OwogCQkJCSNpbnRlcnJ1cHQtY2VsbHMgPSA8MT47CiAJCQkJcmFuZ2VzID0gPDB4ODIw MDAwMDAgMCAwIDB4ODIwMDAwMDAgMHg5IDAgMSAwCiAJCQkJCSAgMHg4MTAwMDAwMCAwIDAgMHg4 MTAwMDAwMCAweDkgMCAxIDA+OwogCQkJCWJ1cy1yYW5nZSA9IDwweDAwIDB4ZmY+OwotCQkJCWlu dGVycnVwdC1tYXAtbWFzayA9IDwwIDAgMCAwPjsKLQkJCQlpbnRlcnJ1cHQtbWFwID0gPDAgMCAw IDAgJm1waWMgOTk+OworCQkJCWludGVycnVwdC1tYXAtbWFzayA9IDwwIDAgMCA3PjsKKwkJCQlp bnRlcnJ1cHQtbWFwID0gPDAgMCAwIDEgJnBjaWU5X2ludGMgMD4sCisJCQkJCQk8MCAwIDAgMiAm cGNpZTlfaW50YyAxPiwKKwkJCQkJCTwwIDAgMCAzICZwY2llOV9pbnRjIDI+LAorCQkJCQkJPDAg MCAwIDQgJnBjaWU5X2ludGMgMz47CiAJCQkJbWFydmVsbCxwY2llLXBvcnQgPSA8Mj47CiAJCQkJ bWFydmVsbCxwY2llLWxhbmUgPSA8MD47CiAJCQkJY2xvY2tzID0gPCZnYXRlY2xrIDI2PjsKIAkJ CQlzdGF0dXMgPSAiZGlzYWJsZWQiOworCisJCQkJcGNpZTlfaW50YzogaW50ZXJydXB0LWNvbnRy b2xsZXIgeworCQkJCQlpbnRlcnJ1cHQtY29udHJvbGxlcjsKKwkJCQkJI2ludGVycnVwdC1jZWxs cyA9IDwxPjsKKwkJCQl9OwogCQkJfTsKIAogCQkJcGNpZTEwOiBwY2llQGEsMCB7CkBAIC0yODEs MTYgKzM3MSwyNiBAQCBwY2llMTA6IHBjaWVAYSwwIHsKIAkJCQlyZWcgPSA8MHg1MDAwIDAgMCAw IDA+OwogCQkJCSNhZGRyZXNzLWNlbGxzID0gPDM+OwogCQkJCSNzaXplLWNlbGxzID0gPDI+Owor CQkJCWludGVycnVwdC1uYW1lcyA9ICJpbnR4IjsKKwkJCQlpbnRlcnJ1cHRzLWV4dGVuZGVkID0g PCZtcGljIDEwMz47CiAJCQkJI2ludGVycnVwdC1jZWxscyA9IDwxPjsKIAkJCQlyYW5nZXMgPSA8 MHg4MjAwMDAwMCAwIDAgMHg4MjAwMDAwMCAweGEgMCAxIDAKIAkJCQkJICAweDgxMDAwMDAwIDAg MCAweDgxMDAwMDAwIDB4YSAwIDEgMD47CiAJCQkJYnVzLXJhbmdlID0gPDB4MDAgMHhmZj47Ci0J CQkJaW50ZXJydXB0LW1hcC1tYXNrID0gPDAgMCAwIDA+OwotCQkJCWludGVycnVwdC1tYXAgPSA8 MCAwIDAgMCAmbXBpYyAxMDM+OworCQkJCWludGVycnVwdC1tYXAtbWFzayA9IDwwIDAgMCA3PjsK KwkJCQlpbnRlcnJ1cHQtbWFwID0gPDAgMCAwIDEgJnBjaWUxMF9pbnRjIDA+LAorCQkJCQkJPDAg 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d=kernel.org; s=k20201202; t=1657644088; bh=4WKRmL2FykAWdl6pWbOT0riuyr9bUPG1WRMUEVP7bOU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M3skOuSd2Sc04Rbu1+S1nWNQei+a1ejS/mKXw67mkTfekp5zp7inI+2+2pqCaUCim KBVfhYIYR020Vpzb9Y0+vS9x7zMPtx7rKB9sjtHv+NTE4BFREoWnuG11bQQCVfKfDV F7duUvZCxLq/IAVyr3xMaCaw8v6O9GUxPEYfjQ1Saw4QcSEbfxhIju/HWvtNB5neRm /vqn0CNu9ixJ0ayI3gEHGD1BUMmBbu5N6MUCOHAhesHEh9oL71a2lvcr89fopasrZI 3tZg6eJqpRQv3d1xBDMrqOTbYpfbgBYg+LJKzR3F6ncuEq7uiWwEaStXtZNEas/OLf bA10SEHlgILVg== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth Cc: Rob Herring , =?UTF-8?q?Pali=20Roh=C3=A1r?= , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH v2 07/10] ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx interrupts Date: Tue, 12 Jul 2022 18:41:05 +0200 Message-Id: <20220712164108.30262-8-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220712164108.30262-1-kabel@kernel.org> References: <20220712164108.30262-1-kabel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Pali Rohár Add definitions for PCIe legacy INTx interrupts. This is required for example in a scenario where a driver requests only one of the legacy interrupts (INTA). Without this, the driver would be notified on events on all 4 (INTA, INTB, INTC, INTD), even if it requested only one of them. Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 140 +++++++++++++++++++---- 1 file changed, 120 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index 230a3fd36b30..16185edf9aa5 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -119,16 +119,26 @@ pcie1: pcie@1,0 { reg = <0x0800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 58>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 58>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port = <0>; marvell,pcie-lane = <0>; clocks = <&gateclk 5>; status = "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie2: pcie@2,0 { @@ -137,16 +147,26 @@ pcie2: pcie@2,0 { reg = <0x1000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 59>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 59>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port = <0>; marvell,pcie-lane = <1>; clocks = <&gateclk 6>; status = "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie3: pcie@3,0 { @@ -155,16 +175,26 @@ pcie3: pcie@3,0 { reg = <0x1800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 60>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 60>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port = <0>; marvell,pcie-lane = <2>; clocks = <&gateclk 7>; status = "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie4: pcie@4,0 { @@ -173,16 +203,26 @@ pcie4: pcie@4,0 { reg = <0x2000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 61>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 0x81000000 0 0 0x81000000 0x4 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 61>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie4_intc 0>, + <0 0 0 2 &pcie4_intc 1>, + <0 0 0 3 &pcie4_intc 2>, + <0 0 0 4 &pcie4_intc 3>; marvell,pcie-port = <0>; marvell,pcie-lane = <3>; clocks = <&gateclk 8>; status = "disabled"; + + pcie4_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie5: pcie@5,0 { @@ -191,16 +231,26 @@ pcie5: pcie@5,0 { reg = <0x2800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 62>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 0x81000000 0 0 0x81000000 0x5 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 62>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie5_intc 0>, + <0 0 0 2 &pcie5_intc 1>, + <0 0 0 3 &pcie5_intc 2>, + <0 0 0 4 &pcie5_intc 3>; marvell,pcie-port = <1>; marvell,pcie-lane = <0>; clocks = <&gateclk 9>; status = "disabled"; + + pcie5_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie6: pcie@6,0 { @@ -209,16 +259,26 @@ pcie6: pcie@6,0 { reg = <0x3000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 63>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 0x81000000 0 0 0x81000000 0x6 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 63>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie6_intc 0>, + <0 0 0 2 &pcie6_intc 1>, + <0 0 0 3 &pcie6_intc 2>, + <0 0 0 4 &pcie6_intc 3>; marvell,pcie-port = <1>; marvell,pcie-lane = <1>; clocks = <&gateclk 10>; status = "disabled"; + + pcie6_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie7: pcie@7,0 { @@ -227,16 +287,26 @@ pcie7: pcie@7,0 { reg = <0x3800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 64>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 0x81000000 0 0 0x81000000 0x7 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 64>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie7_intc 0>, + <0 0 0 2 &pcie7_intc 1>, + <0 0 0 3 &pcie7_intc 2>, + <0 0 0 4 &pcie7_intc 3>; marvell,pcie-port = <1>; marvell,pcie-lane = <2>; clocks = <&gateclk 11>; status = "disabled"; + + pcie7_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie8: pcie@8,0 { @@ -245,16 +315,26 @@ pcie8: pcie@8,0 { reg = <0x4000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 65>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 0x81000000 0 0 0x81000000 0x8 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 65>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie8_intc 0>, + <0 0 0 2 &pcie8_intc 1>, + <0 0 0 3 &pcie8_intc 2>, + <0 0 0 4 &pcie8_intc 3>; marvell,pcie-port = <1>; marvell,pcie-lane = <3>; clocks = <&gateclk 12>; status = "disabled"; + + pcie8_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie9: pcie@9,0 { @@ -263,16 +343,26 @@ pcie9: pcie@9,0 { reg = <0x4800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 99>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 0x81000000 0 0 0x81000000 0x9 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 99>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie9_intc 0>, + <0 0 0 2 &pcie9_intc 1>, + <0 0 0 3 &pcie9_intc 2>, + <0 0 0 4 &pcie9_intc 3>; marvell,pcie-port = <2>; marvell,pcie-lane = <0>; clocks = <&gateclk 26>; status = "disabled"; + + pcie9_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; pcie10: pcie@a,0 { @@ -281,16 +371,26 @@ pcie10: pcie@a,0 { reg = <0x5000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&mpic 103>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 0x81000000 0 0 0x81000000 0xa 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &mpic 103>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie10_intc 0>, + <0 0 0 2 &pcie10_intc 1>, + <0 0 0 3 &pcie10_intc 2>, + <0 0 0 4 &pcie10_intc 3>; marvell,pcie-port = <3>; marvell,pcie-lane = <0>; clocks = <&gateclk 27>; status = "disabled"; + + pcie10_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; }; -- 2.35.1