From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B61CBC43334 for ; Mon, 18 Jul 2022 10:38:51 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B9D4B83E60; Mon, 18 Jul 2022 12:38:49 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 4BADA8118A; Mon, 18 Jul 2022 12:38:48 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id D9BD78401F for ; Mon, 18 Jul 2022 12:38:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andre.przywara@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 87B801042; Mon, 18 Jul 2022 03:38:43 -0700 (PDT) Received: from donnerap.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5D7C23F70D; Mon, 18 Jul 2022 03:38:42 -0700 (PDT) Date: Mon, 18 Jul 2022 11:38:39 +0100 From: Andre Przywara To: Markus Hoffrogge Cc: u-boot@lists.denx.de, macromorgan@hotmail.com, miquel.raynal@bootlin.com Subject: Re: [PATCH] sunxi-nand: fix the PIO instead of DMA implementation Message-ID: <20220718113839.7e8909be@donnerap.cambridge.arm.com> In-Reply-To: References: Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On Thu, 30 Jun 2022 01:26:39 +0200 Markus Hoffrogge wrote: Hi, > The sunxi nand SPL loader was broken at least for SUN4I, > SUN5I and SUN7I SOCs since the implementation change > from DMA to PIO usage - commit 6ddbb1e. > > Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD > being set by method nand_apply_config. > > This flag controls the bus being used for the NFCs internal RAM access. > It must be set for the DMA use case only. > See A33_Nand_Flash_Controller_Specification.pdf page 12. > > This fix is tested by myself on a Cubietruck A20 board. > Others should test it on new generation SOCs as well. I can't really test this, but looking at the datasheet indeed bit 14 must not be set when we intend to read the SRAM buffers directly via MMIO. > Signed-off-by: Markus Hoffrogge Reviewed-by: Andre Przywara Applied to sunxi/master. Cheers, Andre > --- > drivers/mtd/nand/raw/sunxi_nand_spl.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c > b/drivers/mtd/nand/raw/sunxi_nand_spl.c > index a29a76c58d..6de0b0a355 100644 > --- a/drivers/mtd/nand/raw/sunxi_nand_spl.c > +++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c > @@ -208,7 +208,7 @@ static void nand_apply_config(const struct nfc_config > *conf) > > val = readl(SUNXI_NFC_BASE + NFC_CTL); > val &= ~NFC_CTL_PAGE_SIZE_MASK; > - writel(val | NFC_CTL_RAM_METHOD | NFC_CTL_PAGE_SIZE(conf->page_size), > + writel(val | NFC_CTL_PAGE_SIZE(conf->page_size), > SUNXI_NFC_BASE + NFC_CTL); > writel(conf->ecc_size, SUNXI_NFC_BASE + NFC_CNT); > writel(conf->page_size, SUNXI_NFC_BASE + NFC_SPARE_AREA); > --