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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id b19-20020a17090636d300b00722e7e48dfdsm5373808ejc.218.2022.07.18.05.42.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jul 2022 05:42:11 -0700 (PDT) Date: Mon, 18 Jul 2022 14:42:10 +0200 From: Igor Mammedov To: Nikunj A Dadhania Cc: , Paolo Bonzini , Vitaly Kuznetsov , Sean Christopherson , , , , Joao Martins Subject: Re: [PATCH] x86: cpu: Error out if memory exceeds addressable range Message-ID: <20220718144210.4ef95c53@redhat.com> In-Reply-To: <20220718081734.135598-1-nikunj@amd.com> References: <20220718081734.135598-1-nikunj@amd.com> X-Mailer: Claws Mail 4.1.0 (GTK 3.24.34; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 18 Jul 2022 13:47:34 +0530 Nikunj A Dadhania wrote: > Currently it is possible to start a guest with memory that is beyond > the addressable range of CPU and QEMU does not even warn about it. > The default phys_bits is 40 and can address 1TB. However it allows to > start a guest with greater than 1TB memory. > > Prevent this by erroring out in such a scenario. > > Reported-by: Shaju Abraham > Signed-off-by: Nikunj A Dadhania Following shall care of your issue: https://www.mail-archive.com/qemu-devel@nongnu.org/msg900136.html > --- > target/i386/cpu.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 6a57ef13af..1afbdbac7d 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -6376,6 +6376,7 @@ static void x86_cpu_hyperv_realize(X86CPU *cpu) > > static void x86_cpu_realizefn(DeviceState *dev, Error **errp) > { > + MachineState *machine = MACHINE(qdev_get_machine()); > CPUState *cs = CPU(dev); > X86CPU *cpu = X86_CPU(dev); > X86CPUClass *xcc = X86_CPU_GET_CLASS(dev); > @@ -6541,6 +6542,15 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) > } > } > > + if (BIT_ULL(cpu->phys_bits) < machine->maxram_size) { > + error_setg(&local_err, "cannot setup guest memory: " > + "%s memory(%lu MiB) exceeds addressable limit(%llu MiB)", > + machine->maxram_size == machine->ram_size ? "" : "max", > + machine->maxram_size / MiB, > + BIT_ULL(cpu->phys_bits) / MiB); > + goto out; > + } > + > /* Cache information initialization */ > if (!cpu->legacy_cache) { > if (!xcc->model || !xcc->model->cpudef->cache_info) {