From: Michael Grzeschik <mgr@pengutronix.de>
To: Piyush Mehta <piyush.mehta@xilinx.com>
Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, balbi@kernel.org,
linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, michal.simek@xilinx.com,
git@xilinx.com, sivadur@xilinx.com
Subject: Re: [PATCH 0/2] usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume
Date: Wed, 20 Jul 2022 00:06:30 +0200 [thread overview]
Message-ID: <20220719220630.GA24858@pengutronix.de> (raw)
In-Reply-To: <20220613124703.4493-1-piyush.mehta@xilinx.com>
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Hi Piyush!
On Mon, Jun 13, 2022 at 06:17:01PM +0530, Piyush Mehta wrote:
>This patch of the series does the following:
>- Add a new DT "snps,enable_guctl1_resume_quirk" quirk
>- Enable GUCTL1 bit 10 for fixing crc error after resume bug
> When this bit is set to '1', the ULPI opmode will be changed
> to 'normal' along with HS terminations after EOR.
> This option is to support certain legacy ULPI PHYs.
>
>Piyush Mehta (2):
> dt-bindings: usb: snps,dwc3: Add 'snps,enable_guctl1_resume_quirk'
> quirk
> usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after
> resume bug
>
> .../devicetree/bindings/usb/snps,dwc3.yaml | 6 ++++++
> drivers/usb/dwc3/core.c | 16 ++++++++++++++++
> drivers/usb/dwc3/core.h | 6 ++++++
> 3 files changed, 28 insertions(+)
I found your series and am wondering if you are planning to send a v2 of
it? It would really help to see this mainline.
The Xilinx Register Reference states BIT 10 as
RESUME_TERMSEL_XCVRSEL_UNIFY
which seems to be more meaningful than GUCTL1_RESUME_QUIRK. It would
probably make sense to work this in for v2.
The Documentation is also refering more than just opmode to be 0
during EOR. (termsel, xcvrsel, opmode).
https://www.xilinx.com/htmldocs/registers/ug1087/ug1087-zynq-ultrascale-registers.html#usb3_xhci___guctl1.html
Regards,
Michael
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prev parent reply other threads:[~2022-07-19 22:06 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-13 12:47 [PATCH 0/2] usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume Piyush Mehta
2022-06-13 12:47 ` [PATCH 1/2] dt-bindings: usb: snps,dwc3: Add 'snps,enable_guctl1_resume_quirk' quirk Piyush Mehta
2022-06-16 22:42 ` Krzysztof Kozlowski
2022-06-13 12:47 ` [PATCH 2/2] usb: dwc3: core: Enable GUCTL1 bit 10 for fixing crc error after resume bug Piyush Mehta
2022-06-17 22:48 ` Rob Herring
2022-09-08 5:40 ` Mehta, Piyush
2022-07-19 22:06 ` Michael Grzeschik [this message]
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