From: "Pali Rohár" <pali@kernel.org>
To: Stefan Roese <sr@denx.de>
Cc: u-boot@lists.denx.de
Subject: [PATCH] mvebu: pinctrl: apply SDHCI PHY config for A7K
Date: Mon, 25 Jul 2022 14:13:02 +0200 [thread overview]
Message-ID: <20220725121302.9060-1-pali@kernel.org> (raw)
From: Konstantin Porotchkin <kostap@marvell.com>
Current pin control driver applies SDHCI PHY MUX selection
when board DT calls for eMMC function on MPP wires.
However, for CP side eMMC, only the "armada-8k-cpm-pinctrl"
compatibility string is taken into account, which causes
CP-SDHCI on Armada-7K boards to fail.
This patch adds "armada-7k-pinctrl" compatibility string
handling for the CP-SDHCI PHY configuration case.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
---
drivers/pinctrl/mvebu/pinctrl-mvebu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
index 536c6aff96e5..fd49a97b5b0a 100644
--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
+++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
@@ -52,7 +52,9 @@ void mvebu_pinctl_emmc_set_mux(struct udevice *dev, u32 pin, u32 func)
EMMC_PHY_CTRL_SDPHY_EN);
}
} else if (!fdt_node_check_compatible(blob, node,
- "marvell,armada-8k-cpm-pinctrl")) {
+ "marvell,armada-8k-cpm-pinctrl") ||
+ !fdt_node_check_compatible(blob, node,
+ "marvell,armada-7k-pinctrl")) {
if ((pin == CP110_EMMC_CLK_PIN_ID) &&
(func == CP110_EMMC_CLK_FUNC)) {
clrbits_le32(priv->base_reg + CP_EMMC_PHY_CTRL_REG,
--
2.20.1
next reply other threads:[~2022-07-25 12:13 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-25 12:13 Pali Rohár [this message]
2022-07-28 6:33 ` [PATCH] mvebu: pinctrl: apply SDHCI PHY config for A7K Stefan Roese
2022-07-29 12:01 ` Stefan Roese
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