From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B4445C25B0E for ; Tue, 16 Aug 2022 20:00:34 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 187118490B; Tue, 16 Aug 2022 22:00:32 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="e6Z5V/Jo"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id E2B3D848A5; Tue, 16 Aug 2022 22:00:29 +0200 (CEST) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B9A908490B for ; Tue, 16 Aug 2022 22:00:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=pali@kernel.org Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AEF0B60C55; Tue, 16 Aug 2022 20:00:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E91A1C433D6; Tue, 16 Aug 2022 20:00:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660680022; bh=do5FHC+5zrJv7EG8ncKKNrbvtPbAHF+qJvAZt2nTUfg=; h=From:To:Cc:Subject:Date:From; b=e6Z5V/JoQYZu0BcEcotawcuNeNzsvXhJYpgb6mhl+v9OLh4LfcUTMvvOkM2i/2dHN myDzvYzCUFpMI616JDC2E5qG96OQHb7hY/1TkF1Z2bZHrhdMjuDY55qIhsqIIZuPl/ CxmhpTTKJabcmfSzjiRRnIt3kZbE8toME6txI5eu0pbO7paySX7x81QVmQjWYAkIvP 1fCI12WII7kT6/9bChf5rKNdkwFPmmBZ6wsjja/KRgO6FHl+2+r3CuV8DVXu3hvPdF EbkLgL4D3Ix+sA2b4IAwtNi2nHzrSFLZtTO8B8FQnJknH2Y2yUSG+1wxgYQvjpHXVL QFkk2pP7AWmmw== Received: by pali.im (Postfix) id 1981E68B; Tue, 16 Aug 2022 22:00:19 +0200 (CEST) From: =?UTF-8?q?Pali=20Roh=C3=A1r?= To: Stefan Roese , Michael Walle Cc: u-boot@lists.denx.de Subject: [PATCH] arm: kirkwood: 88f6281: Detect CONFIG_SYS_TCLK from SAR register Date: Tue, 16 Aug 2022 22:00:16 +0200 Message-Id: <20220816200016.18288-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Bit 21 in SAR register specifies if TCLK is running at 166 MHz or 200 MHz. This information is undocumented in public Marvell Kirkwood Functional Specifications [2], but is available in Linux v3.15 kirkwood code [1]. Commit 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK") broke support for Marvell 88F6281 SoCs because it was expected that all those SoCs have TCLK running at 200 MHz as specified in Marvell 88F6281 Hardware Specifications [3]. Fix broken support for 88F6281 by detecting CONFIG_SYS_TCLK from SAR register, like it was doing Linux v3.15. [1] - https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/arch/arm/mach-kirkwood/common.c?h=v3.15#n542 [2] - https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf [3] - https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf Fixes: 8ac303d49f89 ("arm: kirkwood: Do not overwrite CONFIG_SYS_TCLK") Signed-off-by: Pali Rohár --- Michael, please test this patch, if it fixes your boards. --- arch/arm/mach-kirkwood/include/mach/kw88f6281.h | 3 ++- arch/arm/mach-kirkwood/include/mach/soc.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h index 87406081cf54..f86cd0bb6013 100644 --- a/arch/arm/mach-kirkwood/include/mach/kw88f6281.h +++ b/arch/arm/mach-kirkwood/include/mach/kw88f6281.h @@ -15,6 +15,7 @@ #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE /* TCLK Core Clock definition */ -#define CONFIG_SYS_TCLK 200000000 /* 200MHz */ +#define CONFIG_SYS_TCLK ((readl(CONFIG_SAR_REG) & BIT(21)) ? \ + 166666667 : 200000000) #endif /* _ASM_ARCH_KW88F6281_H */ diff --git a/arch/arm/mach-kirkwood/include/mach/soc.h b/arch/arm/mach-kirkwood/include/mach/soc.h index 1d7f2828cd38..5f545c6f4349 100644 --- a/arch/arm/mach-kirkwood/include/mach/soc.h +++ b/arch/arm/mach-kirkwood/include/mach/soc.h @@ -62,6 +62,8 @@ #define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE #define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE +#define CONFIG_SAR_REG (KW_MPP_BASE + 0x0030) + #if defined (CONFIG_KW88F6281) #include #elif defined (CONFIG_KW88F6192) -- 2.20.1