From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4F54C32772 for ; Thu, 18 Aug 2022 13:51:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245059AbiHRNvy (ORCPT ); Thu, 18 Aug 2022 09:51:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245273AbiHRNvx (ORCPT ); Thu, 18 Aug 2022 09:51:53 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05BB26110B for ; Thu, 18 Aug 2022 06:51:52 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 960A3615FB for ; Thu, 18 Aug 2022 13:51:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8EDF3C433D6; Thu, 18 Aug 2022 13:51:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660830711; bh=cWiFKrjn8B1g5TW9Qk+4fkbMr0616y3TR9z10rI81Hs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mcOkz4dHwq1e3ouY2wgh+BAZgSl/GMiYwvVnaS2TANd7fGKkewcq15vmtJobjfofh PvDmGiCHFo1HXBs2G6fHyXfGEK4du4FfAwCJIPwdyJI4TT1t17xZ88GFsws8qWlFeS r8CeuFUJF/vd7zxhVxKyM/E4F+V76cBnNWgGK1mtNiodCy5OUpYSakQmhXcGhCQNN9 oRuy61xCJ/53HmuGIXFOrkE+d8+BkpfhnE2wSy/BgxWlMoNnxF+pciRJEoHU1VLD7/ chuwyNWRn4kFcpB/t1ku6gTnab3bK7ZeBzXNWTMb3Hz/iJm5FMDVnAUXAnPKwh2oZX yAxunVg8Hnq3g== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Lorenzo Pieralisi , Bjorn Helgaas Cc: =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH 03/11] PCI: aardvark: Add support for DLLSC and hotplug interrupt Date: Thu, 18 Aug 2022 15:51:32 +0200 Message-Id: <20220818135140.5996-4-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220818135140.5996-1-kabel@kernel.org> References: <20220818135140.5996-1-kabel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Pali Rohár Add support for Data Link Layer State Change in the emulated slot registers and hotplug interrupt via the emulated root bridge. This is mainly useful for when an error causes link down event. With this change, drivers can try recovery. Link down state change can be implemented because Aardvark supports Link Down event interrupt. Use it for signaling that Data Link Layer Link is not active anymore via Hot-Plug Interrupt on emulated root bridge. Link up interrupt is not available on Aardvark, but we check for whether link is up in the advk_pcie_link_up() function. By triggering Hot-Plug Interrupt from this function we achieve Link up event, so long as the function is called (which it is after probe and when rescanning). Although it is not ideal, it is better than nothing. Since advk_pcie_link_up() is not called from interrupt handler, we cannot call generic_handle_domain_irq() from it directly. Instead create a TIMER_IRQSAFE timer and trigger it from advk_pcie_link_up(). (We haven't been able to find any documentation for a Link Up interrupt on Aardvark, but it is possible there is one, in some undocumented register. If we manage to find this information, this can be rewritten.) Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- Change since batch 5: - changed commit message (add paragraph about why the change is needed) - select hotplug and pcieportbus in Kconfig --- drivers/pci/controller/Kconfig | 3 + drivers/pci/controller/pci-aardvark.c | 101 ++++++++++++++++++++++++-- 2 files changed, 99 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index d1c5fcf00a8a..5e8a84f5c654 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -21,6 +21,9 @@ config PCI_AARDVARK depends on OF depends on PCI_MSI_IRQ_DOMAIN select PCI_BRIDGE_EMUL + select PCIEPORTBUS + select HOTPLUG_PCI + select HOTPLUG_PCI_PCIE help Add support for Aardvark 64bit PCIe Host Controller. This controller is part of the South Bridge of the Marvel Armada diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 966c8b48bd96..31da28ebc5d1 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "../pci.h" #include "../pci-bridge-emul.h" @@ -100,6 +101,7 @@ #define PCIE_MSG_PM_PME_MASK BIT(7) #define PCIE_ISR0_MASK_REG (CONTROL_BASE_ADDR + 0x44) #define PCIE_ISR0_MSI_INT_PENDING BIT(24) +#define PCIE_ISR0_LINK_DOWN BIT(1) #define PCIE_ISR0_CORR_ERR BIT(11) #define PCIE_ISR0_NFAT_ERR BIT(12) #define PCIE_ISR0_FAT_ERR BIT(13) @@ -284,6 +286,8 @@ struct advk_pcie { DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); struct mutex msi_used_lock; int link_gen; + bool link_was_up; + struct timer_list link_irq_timer; struct pci_bridge_emul bridge; struct gpio_desc *reset_gpio; struct phy *phy; @@ -313,7 +317,24 @@ static inline bool advk_pcie_link_up(struct advk_pcie *pcie) { /* check if LTSSM is in normal operation - some L* state */ u8 ltssm_state = advk_pcie_ltssm_state(pcie); - return ltssm_state >= LTSSM_L0 && ltssm_state < LTSSM_DISABLED; + bool link_is_up; + u16 slotsta; + + link_is_up = ltssm_state >= LTSSM_L0 && ltssm_state < LTSSM_DISABLED; + + if (link_is_up && !pcie->link_was_up) { + dev_info(&pcie->pdev->dev, "link up\n"); + + pcie->link_was_up = true; + + slotsta = le16_to_cpu(pcie->bridge.pcie_conf.slotsta); + slotsta |= PCI_EXP_SLTSTA_DLLSC; + pcie->bridge.pcie_conf.slotsta = cpu_to_le16(slotsta); + + mod_timer(&pcie->link_irq_timer, jiffies + 1); + } + + return link_is_up; } static inline bool advk_pcie_link_active(struct advk_pcie *pcie) @@ -442,8 +463,6 @@ static void advk_pcie_train_link(struct advk_pcie *pcie) ret = advk_pcie_wait_for_link(pcie); if (ret < 0) dev_err(dev, "link never came up\n"); - else - dev_info(dev, "link up\n"); } /* @@ -592,6 +611,11 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg &= ~PCIE_ISR0_MSI_INT_PENDING; advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); + /* Unmask Link Down interrupt */ + reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); + reg &= ~PCIE_ISR0_LINK_DOWN; + advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); + /* Unmask PME interrupt for processing of PME requester */ reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); reg &= ~PCIE_MSG_PM_PME_MASK; @@ -918,6 +942,14 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, advk_pcie_wait_for_retrain(pcie); break; + case PCI_EXP_SLTCTL: { + u16 slotctl = le16_to_cpu(bridge->pcie_conf.slotctl); + /* Only emulation of HPIE and DLLSCE bits is provided */ + slotctl &= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_DLLSCE; + bridge->pcie_conf.slotctl = cpu_to_le16(slotctl); + break; + } + case PCI_EXP_RTCTL: { u16 rootctl = le16_to_cpu(bridge->pcie_conf.rootctl); /* Only emulation of PMEIE and CRSSVE bits is provided */ @@ -1035,6 +1067,7 @@ static const struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = { static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) { struct pci_bridge_emul *bridge = &pcie->bridge; + u32 slotcap; bridge->conf.vendor = cpu_to_le16(advk_readl(pcie, PCIE_CORE_DEV_ID_REG) & 0xffff); @@ -1061,6 +1094,13 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) bridge->pcie_conf.cap = cpu_to_le16(2 | PCI_EXP_FLAGS_SLOT); /* + * Mark bridge as Hot Plug Capable since this is the way how to enable + * delivering of Data Link Layer State Change interrupts. + * + * Set No Command Completed Support because bridge does not support + * Command Completed Interrupt. Every command is executed immediately + * without any delay. + * * Set Presence Detect State bit permanently since there is no support * for unplugging the card nor detecting whether it is plugged. (If a * platform exists in the future that supports it, via a GPIO for @@ -1070,8 +1110,9 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) * value is reserved for ports within the same silicon as Root Port * which is not our case. */ - bridge->pcie_conf.slotcap = cpu_to_le32(FIELD_PREP(PCI_EXP_SLTCAP_PSN, - 1)); + slotcap = PCI_EXP_SLTCAP_NCCS | PCI_EXP_SLTCAP_HPC | + FIELD_PREP(PCI_EXP_SLTCAP_PSN, 1); + bridge->pcie_conf.slotcap = cpu_to_le32(slotcap); bridge->pcie_conf.slotsta = cpu_to_le16(PCI_EXP_SLTSTA_PDS); /* Indicates supports for Completion Retry Status */ @@ -1568,6 +1609,24 @@ static void advk_pcie_remove_rp_irq_domain(struct advk_pcie *pcie) irq_domain_remove(pcie->rp_irq_domain); } +static void advk_pcie_link_irq_handler(struct timer_list *timer) +{ + struct advk_pcie *pcie = from_timer(pcie, timer, link_irq_timer); + u16 slotctl; + + slotctl = le16_to_cpu(pcie->bridge.pcie_conf.slotctl); + if (!(slotctl & PCI_EXP_SLTCTL_DLLSCE) || + !(slotctl & PCI_EXP_SLTCTL_HPIE)) + return; + + /* + * Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, so use PCIe + * interrupt 0 + */ + if (generic_handle_domain_irq(pcie->rp_irq_domain, 0) == -EINVAL) + dev_err_ratelimited(&pcie->pdev->dev, "unhandled HP IRQ\n"); +} + static void advk_pcie_handle_pme(struct advk_pcie *pcie) { u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16; @@ -1619,6 +1678,7 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) { u32 isr0_val, isr0_mask, isr0_status; u32 isr1_val, isr1_mask, isr1_status; + u16 slotsta; int i; isr0_val = advk_readl(pcie, PCIE_ISR0_REG); @@ -1645,6 +1705,26 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n"); } + /* Process Link Down interrupt as HP IRQ */ + if (isr0_status & PCIE_ISR0_LINK_DOWN) { + advk_writel(pcie, PCIE_ISR0_LINK_DOWN, PCIE_ISR0_REG); + + dev_info(&pcie->pdev->dev, "link down\n"); + + pcie->link_was_up = false; + + slotsta = le16_to_cpu(pcie->bridge.pcie_conf.slotsta); + slotsta |= PCI_EXP_SLTSTA_DLLSC; + pcie->bridge.pcie_conf.slotsta = cpu_to_le16(slotsta); + + /* + * Deactivate timer and call advk_pcie_link_irq_handler() + * function directly as we are in the interrupt context. + */ + del_timer_sync(&pcie->link_irq_timer); + advk_pcie_link_irq_handler(&pcie->link_irq_timer); + } + /* Process MSI interrupts */ if (isr0_status & PCIE_ISR0_MSI_INT_PENDING) advk_pcie_handle_msi(pcie); @@ -1881,6 +1961,14 @@ static int advk_pcie_probe(struct platform_device *pdev) if (ret) return ret; + /* + * generic_handle_domain_irq() expects local IRQs to be disabled since + * normally it is called from interrupt context, so use TIMER_IRQSAFE + * flag for this link_irq_timer. + */ + timer_setup(&pcie->link_irq_timer, advk_pcie_link_irq_handler, + TIMER_IRQSAFE); + advk_pcie_setup_hw(pcie); ret = advk_sw_pci_bridge_init(pcie); @@ -1969,6 +2057,9 @@ static int advk_pcie_remove(struct platform_device *pdev) advk_pcie_remove_msi_irq_domain(pcie); advk_pcie_remove_irq_domain(pcie); + /* Deactivate link event timer */ + del_timer_sync(&pcie->link_irq_timer); + /* Free config space for emulated root bridge */ pci_bridge_emul_cleanup(&pcie->bridge); -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A47D8C00140 for ; Thu, 18 Aug 2022 14:02:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: 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=?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH 03/11] PCI: aardvark: Add support for DLLSC and hotplug interrupt Date: Thu, 18 Aug 2022 15:51:32 +0200 Message-Id: <20220818135140.5996-4-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220818135140.5996-1-kabel@kernel.org> References: <20220818135140.5996-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220818_065154_935626_17767782 X-CRM114-Status: GOOD ( 30.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RnJvbTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KCkFkZCBzdXBwb3J0IGZvciBEYXRh IExpbmsgTGF5ZXIgU3RhdGUgQ2hhbmdlIGluIHRoZSBlbXVsYXRlZCBzbG90CnJlZ2lzdGVycyBh bmQgaG90cGx1ZyBpbnRlcnJ1cHQgdmlhIHRoZSBlbXVsYXRlZCByb290IGJyaWRnZS4KClRoaXMg aXMgbWFpbmx5IHVzZWZ1bCBmb3Igd2hlbiBhbiBlcnJvciBjYXVzZXMgbGluayBkb3duIGV2ZW50 LiBXaXRoCnRoaXMgY2hhbmdlLCBkcml2ZXJzIGNhbiB0cnkgcmVjb3ZlcnkuCgpMaW5rIGRvd24g c3RhdGUgY2hhbmdlIGNhbiBiZSBpbXBsZW1lbnRlZCBiZWNhdXNlIEFhcmR2YXJrIHN1cHBvcnRz IExpbmsKRG93biBldmVudCBpbnRlcnJ1cHQuIFVzZSBpdCBmb3Igc2lnbmFsaW5nIHRoYXQgRGF0 YSBMaW5rIExheWVyIExpbmsgaXMKbm90IGFjdGl2ZSBhbnltb3JlIHZpYSBIb3QtUGx1ZyBJbnRl cnJ1cHQgb24gZW11bGF0ZWQgcm9vdCBicmlkZ2UuCgpMaW5rIHVwIGludGVycnVwdCBpcyBub3Qg YXZhaWxhYmxlIG9uIEFhcmR2YXJrLCBidXQgd2UgY2hlY2sgZm9yIHdoZXRoZXIKbGluayBpcyB1 cCBpbiB0aGUgYWR2a19wY2llX2xpbmtfdXAoKSBmdW5jdGlvbi4gQnkgdHJpZ2dlcmluZyBIb3Qt UGx1ZwpJbnRlcnJ1cHQgZnJvbSB0aGlzIGZ1bmN0aW9uIHdlIGFjaGlldmUgTGluayB1cCBldmVu dCwgc28gbG9uZyBhcyB0aGUKZnVuY3Rpb24gaXMgY2FsbGVkICh3aGljaCBpdCBpcyBhZnRlciBw cm9iZSBhbmQgd2hlbiByZXNjYW5uaW5nKS4KQWx0aG91Z2ggaXQgaXMgbm90IGlkZWFsLCBpdCBp cyBiZXR0ZXIgdGhhbiBub3RoaW5nLgoKU2luY2UgYWR2a19wY2llX2xpbmtfdXAoKSBpcyBub3Qg Y2FsbGVkIGZyb20gaW50ZXJydXB0IGhhbmRsZXIsIHdlCmNhbm5vdCBjYWxsIGdlbmVyaWNfaGFu ZGxlX2RvbWFpbl9pcnEoKSBmcm9tIGl0IGRpcmVjdGx5LiBJbnN0ZWFkIGNyZWF0ZQphIFRJTUVS X0lSUVNBRkUgdGltZXIgYW5kIHRyaWdnZXIgaXQgZnJvbSBhZHZrX3BjaWVfbGlua191cCgpLgoK KFdlIGhhdmVuJ3QgYmVlbiBhYmxlIHRvIGZpbmQgYW55IGRvY3VtZW50YXRpb24gZm9yIGEgTGlu ayBVcCBpbnRlcnJ1cHQKIG9uIEFhcmR2YXJrLCBidXQgaXQgaXMgcG9zc2libGUgdGhlcmUgaXMg b25lLCBpbiBzb21lIHVuZG9jdW1lbnRlZAogcmVnaXN0ZXIuIElmIHdlIG1hbmFnZSB0byBmaW5k IHRoaXMgaW5mb3JtYXRpb24sIHRoaXMgY2FuIGJlCiByZXdyaXR0ZW4uKQoKU2lnbmVkLW9mZi1i eTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KU2lnbmVkLW9mZi1ieTogTWFyZWsgQmVo w7puIDxrYWJlbEBrZXJuZWwub3JnPgotLS0KQ2hhbmdlIHNpbmNlIGJhdGNoIDU6Ci0gY2hhbmdl ZCBjb21taXQgbWVzc2FnZSAoYWRkIHBhcmFncmFwaCBhYm91dCB3aHkgdGhlIGNoYW5nZSBpcyBu ZWVkZWQpCi0gc2VsZWN0IGhvdHBsdWcgYW5kIHBjaWVwb3J0YnVzIGluIEtjb25maWcKLS0tCiBk cml2ZXJzL3BjaS9jb250cm9sbGVyL0tjb25maWcgICAgICAgIHwgICAzICsKIGRyaXZlcnMvcGNp L2NvbnRyb2xsZXIvcGNpLWFhcmR2YXJrLmMgfCAxMDEgKysrKysrKysrKysrKysrKysrKysrKysr LS0KIDIgZmlsZXMgY2hhbmdlZCwgOTkgaW5zZXJ0aW9ucygrKSwgNSBkZWxldGlvbnMoLSkKCmRp ZmYgLS1naXQgYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL0tjb25maWcgYi9kcml2ZXJzL3BjaS9j b250cm9sbGVyL0tjb25maWcKaW5kZXggZDFjNWZjZjAwYThhLi41ZThhODRmNWM2NTQgMTAwNjQ0 Ci0tLSBhL2RyaXZlcnMvcGNpL2NvbnRyb2xsZXIvS2NvbmZpZworKysgYi9kcml2ZXJzL3BjaS9j b250cm9sbGVyL0tjb25maWcKQEAgLTIxLDYgKzIxLDkgQEAgY29uZmlnIFBDSV9BQVJEVkFSSwog CWRlcGVuZHMgb24gT0YKIAlkZXBlbmRzIG9uIFBDSV9NU0lfSVJRX0RPTUFJTgogCXNlbGVjdCBQ Q0lfQlJJREdFX0VNVUwKKwlzZWxlY3QgUENJRVBPUlRCVVMKKwlzZWxlY3QgSE9UUExVR19QQ0kK KwlzZWxlY3QgSE9UUExVR19QQ0lfUENJRQogCWhlbHAKIAkgQWRkIHN1cHBvcnQgZm9yIEFhcmR2 YXJrIDY0Yml0IFBDSWUgSG9zdCBDb250cm9sbGVyLiBUaGlzCiAJIGNvbnRyb2xsZXIgaXMgcGFy dCBvZiB0aGUgU291dGggQnJpZGdlIG9mIHRoZSBNYXJ2ZWwgQXJtYWRhCmRpZmYgLS1naXQgYS9k cml2ZXJzL3BjaS9jb250cm9sbGVyL3BjaS1hYXJkdmFyay5jIGIvZHJpdmVycy9wY2kvY29udHJv bGxlci9wY2ktYWFyZHZhcmsuYwppbmRleCA5NjZjOGI0OGJkOTYuLjMxZGEyOGViYzVkMSAxMDA2 NDQKLS0tIGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9wY2ktYWFyZHZhcmsuYworKysgYi9kcml2 ZXJzL3BjaS9jb250cm9sbGVyL3BjaS1hYXJkdmFyay5jCkBAIC0yNSw2ICsyNSw3IEBACiAjaW5j bHVkZSA8bGludXgvb2ZfYWRkcmVzcy5oPgogI2luY2x1ZGUgPGxpbnV4L29mX2dwaW8uaD4KICNp bmNsdWRlIDxsaW51eC9vZl9wY2kuaD4KKyNpbmNsdWRlIDxsaW51eC90aW1lci5oPgogCiAjaW5j bHVkZSAiLi4vcGNpLmgiCiAjaW5jbHVkZSAiLi4vcGNpLWJyaWRnZS1lbXVsLmgiCkBAIC0xMDAs NiArMTAxLDcgQEAKICNkZWZpbmUgUENJRV9NU0dfUE1fUE1FX01BU0sJCQlCSVQoNykKICNkZWZp bmUgUENJRV9JU1IwX01BU0tfUkVHCQkJKENPTlRST0xfQkFTRV9BRERSICsgMHg0NCkKICNkZWZp bmUgICAgIFBDSUVfSVNSMF9NU0lfSU5UX1BFTkRJTkcJCUJJVCgyNCkKKyNkZWZpbmUgICAgIFBD SUVfSVNSMF9MSU5LX0RPV04JCQlCSVQoMSkKICNkZWZpbmUgICAgIFBDSUVfSVNSMF9DT1JSX0VS UgkJCUJJVCgxMSkKICNkZWZpbmUgICAgIFBDSUVfSVNSMF9ORkFUX0VSUgkJCUJJVCgxMikKICNk ZWZpbmUgICAgIFBDSUVfSVNSMF9GQVRfRVJSCQkJQklUKDEzKQpAQCAtMjg0LDYgKzI4Niw4IEBA IHN0cnVjdCBhZHZrX3BjaWUgewogCURFQ0xBUkVfQklUTUFQKG1zaV91c2VkLCBNU0lfSVJRX05V TSk7CiAJc3RydWN0IG11dGV4IG1zaV91c2VkX2xvY2s7CiAJaW50IGxpbmtfZ2VuOworCWJvb2wg bGlua193YXNfdXA7CisJc3RydWN0IHRpbWVyX2xpc3QgbGlua19pcnFfdGltZXI7CiAJc3RydWN0 IHBjaV9icmlkZ2VfZW11bCBicmlkZ2U7CiAJc3RydWN0IGdwaW9fZGVzYyAqcmVzZXRfZ3BpbzsK IAlzdHJ1Y3QgcGh5ICpwaHk7CkBAIC0zMTMsNyArMzE3LDI0IEBAIHN0YXRpYyBpbmxpbmUgYm9v bCBhZHZrX3BjaWVfbGlua191cChzdHJ1Y3QgYWR2a19wY2llICpwY2llKQogewogCS8qIGNoZWNr IGlmIExUU1NNIGlzIGluIG5vcm1hbCBvcGVyYXRpb24gLSBzb21lIEwqIHN0YXRlICovCiAJdTgg bHRzc21fc3RhdGUgPSBhZHZrX3BjaWVfbHRzc21fc3RhdGUocGNpZSk7Ci0JcmV0dXJuIGx0c3Nt X3N0YXRlID49IExUU1NNX0wwICYmIGx0c3NtX3N0YXRlIDwgTFRTU01fRElTQUJMRUQ7CisJYm9v bCBsaW5rX2lzX3VwOworCXUxNiBzbG90c3RhOworCisJbGlua19pc191cCA9IGx0c3NtX3N0YXRl ID49IExUU1NNX0wwICYmIGx0c3NtX3N0YXRlIDwgTFRTU01fRElTQUJMRUQ7CisKKwlpZiAobGlu a19pc191cCAmJiAhcGNpZS0+bGlua193YXNfdXApIHsKKwkJZGV2X2luZm8oJnBjaWUtPnBkZXYt PmRldiwgImxpbmsgdXBcbiIpOworCisJCXBjaWUtPmxpbmtfd2FzX3VwID0gdHJ1ZTsKKworCQlz bG90c3RhID0gbGUxNl90b19jcHUocGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90c3RhKTsKKwkJ c2xvdHN0YSB8PSBQQ0lfRVhQX1NMVFNUQV9ETExTQzsKKwkJcGNpZS0+YnJpZGdlLnBjaWVfY29u Zi5zbG90c3RhID0gY3B1X3RvX2xlMTYoc2xvdHN0YSk7CisKKwkJbW9kX3RpbWVyKCZwY2llLT5s aW5rX2lycV90aW1lciwgamlmZmllcyArIDEpOworCX0KKworCXJldHVybiBsaW5rX2lzX3VwOwog fQogCiBzdGF0aWMgaW5saW5lIGJvb2wgYWR2a19wY2llX2xpbmtfYWN0aXZlKHN0cnVjdCBhZHZr X3BjaWUgKnBjaWUpCkBAIC00NDIsOCArNDYzLDYgQEAgc3RhdGljIHZvaWQgYWR2a19wY2llX3Ry YWluX2xpbmsoc3RydWN0IGFkdmtfcGNpZSAqcGNpZSkKIAlyZXQgPSBhZHZrX3BjaWVfd2FpdF9m b3JfbGluayhwY2llKTsKIAlpZiAocmV0IDwgMCkKIAkJZGV2X2VycihkZXYsICJsaW5rIG5ldmVy IGNhbWUgdXBcbiIpOwotCWVsc2UKLQkJZGV2X2luZm8oZGV2LCAibGluayB1cFxuIik7CiB9CiAK IC8qCkBAIC01OTIsNiArNjExLDExIEBAIHN0YXRpYyB2b2lkIGFkdmtfcGNpZV9zZXR1cF9odyhz dHJ1Y3QgYWR2a19wY2llICpwY2llKQogCXJlZyAmPSB+UENJRV9JU1IwX01TSV9JTlRfUEVORElO RzsKIAlhZHZrX3dyaXRlbChwY2llLCByZWcsIFBDSUVfSVNSMF9NQVNLX1JFRyk7CiAKKwkvKiBV bm1hc2sgTGluayBEb3duIGludGVycnVwdCAqLworCXJlZyA9IGFkdmtfcmVhZGwocGNpZSwgUENJ RV9JU1IwX01BU0tfUkVHKTsKKwlyZWcgJj0gflBDSUVfSVNSMF9MSU5LX0RPV047CisJYWR2a193 cml0ZWwocGNpZSwgcmVnLCBQQ0lFX0lTUjBfTUFTS19SRUcpOworCiAJLyogVW5tYXNrIFBNRSBp bnRlcnJ1cHQgZm9yIHByb2Nlc3Npbmcgb2YgUE1FIHJlcXVlc3RlciAqLwogCXJlZyA9IGFkdmtf cmVhZGwocGNpZSwgUENJRV9JU1IwX01BU0tfUkVHKTsKIAlyZWcgJj0gflBDSUVfTVNHX1BNX1BN RV9NQVNLOwpAQCAtOTE4LDYgKzk0MiwxNCBAQCBhZHZrX3BjaV9icmlkZ2VfZW11bF9wY2llX2Nv bmZfd3JpdGUoc3RydWN0IHBjaV9icmlkZ2VfZW11bCAqYnJpZGdlLAogCQkJYWR2a19wY2llX3dh aXRfZm9yX3JldHJhaW4ocGNpZSk7CiAJCWJyZWFrOwogCisJY2FzZSBQQ0lfRVhQX1NMVENUTDog eworCQl1MTYgc2xvdGN0bCA9IGxlMTZfdG9fY3B1KGJyaWRnZS0+cGNpZV9jb25mLnNsb3RjdGwp OworCQkvKiBPbmx5IGVtdWxhdGlvbiBvZiBIUElFIGFuZCBETExTQ0UgYml0cyBpcyBwcm92aWRl ZCAqLworCQlzbG90Y3RsICY9IFBDSV9FWFBfU0xUQ1RMX0hQSUUgfCBQQ0lfRVhQX1NMVENUTF9E TExTQ0U7CisJCWJyaWRnZS0+cGNpZV9jb25mLnNsb3RjdGwgPSBjcHVfdG9fbGUxNihzbG90Y3Rs KTsKKwkJYnJlYWs7CisJfQorCiAJY2FzZSBQQ0lfRVhQX1JUQ1RMOiB7CiAJCXUxNiByb290Y3Rs ID0gbGUxNl90b19jcHUoYnJpZGdlLT5wY2llX2NvbmYucm9vdGN0bCk7CiAJCS8qIE9ubHkgZW11 bGF0aW9uIG9mIFBNRUlFIGFuZCBDUlNTVkUgYml0cyBpcyBwcm92aWRlZCAqLwpAQCAtMTAzNSw2 ICsxMDY3LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBwY2lfYnJpZGdlX2VtdWxfb3BzIGFkdmtf cGNpX2JyaWRnZV9lbXVsX29wcyA9IHsKIHN0YXRpYyBpbnQgYWR2a19zd19wY2lfYnJpZGdlX2lu aXQoc3RydWN0IGFkdmtfcGNpZSAqcGNpZSkKIHsKIAlzdHJ1Y3QgcGNpX2JyaWRnZV9lbXVsICpi cmlkZ2UgPSAmcGNpZS0+YnJpZGdlOworCXUzMiBzbG90Y2FwOwogCiAJYnJpZGdlLT5jb25mLnZl bmRvciA9CiAJCWNwdV90b19sZTE2KGFkdmtfcmVhZGwocGNpZSwgUENJRV9DT1JFX0RFVl9JRF9S RUcpICYgMHhmZmZmKTsKQEAgLTEwNjEsNiArMTA5NCwxMyBAQCBzdGF0aWMgaW50IGFkdmtfc3df cGNpX2JyaWRnZV9pbml0KHN0cnVjdCBhZHZrX3BjaWUgKnBjaWUpCiAJYnJpZGdlLT5wY2llX2Nv bmYuY2FwID0gY3B1X3RvX2xlMTYoMiB8IFBDSV9FWFBfRkxBR1NfU0xPVCk7CiAKIAkvKgorCSAq IE1hcmsgYnJpZGdlIGFzIEhvdCBQbHVnIENhcGFibGUgc2luY2UgdGhpcyBpcyB0aGUgd2F5IGhv dyB0byBlbmFibGUKKwkgKiBkZWxpdmVyaW5nIG9mIERhdGEgTGluayBMYXllciBTdGF0ZSBDaGFu Z2UgaW50ZXJydXB0cy4KKwkgKgorCSAqIFNldCBObyBDb21tYW5kIENvbXBsZXRlZCBTdXBwb3J0 IGJlY2F1c2UgYnJpZGdlIGRvZXMgbm90IHN1cHBvcnQKKwkgKiBDb21tYW5kIENvbXBsZXRlZCBJ bnRlcnJ1cHQuIEV2ZXJ5IGNvbW1hbmQgaXMgZXhlY3V0ZWQgaW1tZWRpYXRlbHkKKwkgKiB3aXRo b3V0IGFueSBkZWxheS4KKwkgKgogCSAqIFNldCBQcmVzZW5jZSBEZXRlY3QgU3RhdGUgYml0IHBl cm1hbmVudGx5IHNpbmNlIHRoZXJlIGlzIG5vIHN1cHBvcnQKIAkgKiBmb3IgdW5wbHVnZ2luZyB0 aGUgY2FyZCBub3IgZGV0ZWN0aW5nIHdoZXRoZXIgaXQgaXMgcGx1Z2dlZC4gKElmIGEKIAkgKiBw bGF0Zm9ybSBleGlzdHMgaW4gdGhlIGZ1dHVyZSB0aGF0IHN1cHBvcnRzIGl0LCB2aWEgYSBHUElP IGZvcgpAQCAtMTA3MCw4ICsxMTEwLDkgQEAgc3RhdGljIGludCBhZHZrX3N3X3BjaV9icmlkZ2Vf aW5pdChzdHJ1Y3QgYWR2a19wY2llICpwY2llKQogCSAqIHZhbHVlIGlzIHJlc2VydmVkIGZvciBw b3J0cyB3aXRoaW4gdGhlIHNhbWUgc2lsaWNvbiBhcyBSb290IFBvcnQKIAkgKiB3aGljaCBpcyBu b3Qgb3VyIGNhc2UuCiAJICovCi0JYnJpZGdlLT5wY2llX2NvbmYuc2xvdGNhcCA9IGNwdV90b19s ZTMyKEZJRUxEX1BSRVAoUENJX0VYUF9TTFRDQVBfUFNOLAotCQkJCQkJCSAgIDEpKTsKKwlzbG90 Y2FwID0gUENJX0VYUF9TTFRDQVBfTkNDUyB8IFBDSV9FWFBfU0xUQ0FQX0hQQyB8CisJCSAgRklF TERfUFJFUChQQ0lfRVhQX1NMVENBUF9QU04sIDEpOworCWJyaWRnZS0+cGNpZV9jb25mLnNsb3Rj YXAgPSBjcHVfdG9fbGUzMihzbG90Y2FwKTsKIAlicmlkZ2UtPnBjaWVfY29uZi5zbG90c3RhID0g Y3B1X3RvX2xlMTYoUENJX0VYUF9TTFRTVEFfUERTKTsKIAogCS8qIEluZGljYXRlcyBzdXBwb3J0 cyBmb3IgQ29tcGxldGlvbiBSZXRyeSBTdGF0dXMgKi8KQEAgLTE1NjgsNiArMTYwOSwyNCBAQCBz dGF0aWMgdm9pZCBhZHZrX3BjaWVfcmVtb3ZlX3JwX2lycV9kb21haW4oc3RydWN0IGFkdmtfcGNp ZSAqcGNpZSkKIAlpcnFfZG9tYWluX3JlbW92ZShwY2llLT5ycF9pcnFfZG9tYWluKTsKIH0KIAor c3RhdGljIHZvaWQgYWR2a19wY2llX2xpbmtfaXJxX2hhbmRsZXIoc3RydWN0IHRpbWVyX2xpc3Qg KnRpbWVyKQoreworCXN0cnVjdCBhZHZrX3BjaWUgKnBjaWUgPSBmcm9tX3RpbWVyKHBjaWUsIHRp bWVyLCBsaW5rX2lycV90aW1lcik7CisJdTE2IHNsb3RjdGw7CisKKwlzbG90Y3RsID0gbGUxNl90 b19jcHUocGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90Y3RsKTsKKwlpZiAoIShzbG90Y3RsICYg UENJX0VYUF9TTFRDVExfRExMU0NFKSB8fAorCSAgICAhKHNsb3RjdGwgJiBQQ0lfRVhQX1NMVENU TF9IUElFKSkKKwkJcmV0dXJuOworCisJLyoKKwkgKiBBYXJkdmFyayBIVyByZXR1cm5zIHplcm8g Zm9yIFBDSV9FWFBfRkxBR1NfSVJRLCBzbyB1c2UgUENJZQorCSAqIGludGVycnVwdCAwCisJICov CisJaWYgKGdlbmVyaWNfaGFuZGxlX2RvbWFpbl9pcnEocGNpZS0+cnBfaXJxX2RvbWFpbiwgMCkg PT0gLUVJTlZBTCkKKwkJZGV2X2Vycl9yYXRlbGltaXRlZCgmcGNpZS0+cGRldi0+ZGV2LCAidW5o YW5kbGVkIEhQIElSUVxuIik7Cit9CisKIHN0YXRpYyB2b2lkIGFkdmtfcGNpZV9oYW5kbGVfcG1l KHN0cnVjdCBhZHZrX3BjaWUgKnBjaWUpCiB7CiAJdTMyIHJlcXVlc3RlciA9IGFkdmtfcmVhZGwo cGNpZSwgUENJRV9NU0dfTE9HX1JFRykgPj4gMTY7CkBAIC0xNjE5LDYgKzE2NzgsNyBAQCBzdGF0 aWMgdm9pZCBhZHZrX3BjaWVfaGFuZGxlX2ludChzdHJ1Y3QgYWR2a19wY2llICpwY2llKQogewog CXUzMiBpc3IwX3ZhbCwgaXNyMF9tYXNrLCBpc3IwX3N0YXR1czsKIAl1MzIgaXNyMV92YWwsIGlz cjFfbWFzaywgaXNyMV9zdGF0dXM7CisJdTE2IHNsb3RzdGE7CiAJaW50IGk7CiAKIAlpc3IwX3Zh bCA9IGFkdmtfcmVhZGwocGNpZSwgUENJRV9JU1IwX1JFRyk7CkBAIC0xNjQ1LDYgKzE3MDUsMjYg QEAgc3RhdGljIHZvaWQgYWR2a19wY2llX2hhbmRsZV9pbnQoc3RydWN0IGFkdmtfcGNpZSAqcGNp ZSkKIAkJCWRldl9lcnJfcmF0ZWxpbWl0ZWQoJnBjaWUtPnBkZXYtPmRldiwgInVuaGFuZGxlZCBF UlIgSVJRXG4iKTsKIAl9CiAKKwkvKiBQcm9jZXNzIExpbmsgRG93biBpbnRlcnJ1cHQgYXMgSFAg SVJRICovCisJaWYgKGlzcjBfc3RhdHVzICYgUENJRV9JU1IwX0xJTktfRE9XTikgeworCQlhZHZr X3dyaXRlbChwY2llLCBQQ0lFX0lTUjBfTElOS19ET1dOLCBQQ0lFX0lTUjBfUkVHKTsKKworCQlk ZXZfaW5mbygmcGNpZS0+cGRldi0+ZGV2LCAibGluayBkb3duXG4iKTsKKworCQlwY2llLT5saW5r X3dhc191cCA9IGZhbHNlOworCisJCXNsb3RzdGEgPSBsZTE2X3RvX2NwdShwY2llLT5icmlkZ2Uu cGNpZV9jb25mLnNsb3RzdGEpOworCQlzbG90c3RhIHw9IFBDSV9FWFBfU0xUU1RBX0RMTFNDOwor CQlwY2llLT5icmlkZ2UucGNpZV9jb25mLnNsb3RzdGEgPSBjcHVfdG9fbGUxNihzbG90c3RhKTsK KworCQkvKgorCQkgKiBEZWFjdGl2YXRlIHRpbWVyIGFuZCBjYWxsIGFkdmtfcGNpZV9saW5rX2ly cV9oYW5kbGVyKCkKKwkJICogZnVuY3Rpb24gZGlyZWN0bHkgYXMgd2UgYXJlIGluIHRoZSBpbnRl cnJ1cHQgY29udGV4dC4KKwkJICovCisJCWRlbF90aW1lcl9zeW5jKCZwY2llLT5saW5rX2lycV90 aW1lcik7CisJCWFkdmtfcGNpZV9saW5rX2lycV9oYW5kbGVyKCZwY2llLT5saW5rX2lycV90aW1l cik7CisJfQorCiAJLyogUHJvY2VzcyBNU0kgaW50ZXJydXB0cyAqLwogCWlmIChpc3IwX3N0YXR1 cyAmIFBDSUVfSVNSMF9NU0lfSU5UX1BFTkRJTkcpCiAJCWFkdmtfcGNpZV9oYW5kbGVfbXNpKHBj aWUpOwpAQCAtMTg4MSw2ICsxOTYxLDE0IEBAIHN0YXRpYyBpbnQgYWR2a19wY2llX3Byb2JlKHN0 cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJaWYgKHJldCkKIAkJcmV0dXJuIHJldDsKIAor CS8qCisJICogZ2VuZXJpY19oYW5kbGVfZG9tYWluX2lycSgpIGV4cGVjdHMgbG9jYWwgSVJRcyB0 byBiZSBkaXNhYmxlZCBzaW5jZQorCSAqIG5vcm1hbGx5IGl0IGlzIGNhbGxlZCBmcm9tIGludGVy cnVwdCBjb250ZXh0LCBzbyB1c2UgVElNRVJfSVJRU0FGRQorCSAqIGZsYWcgZm9yIHRoaXMgbGlu a19pcnFfdGltZXIuCisJICovCisJdGltZXJfc2V0dXAoJnBjaWUtPmxpbmtfaXJxX3RpbWVyLCBh ZHZrX3BjaWVfbGlua19pcnFfaGFuZGxlciwKKwkJICAgIFRJTUVSX0lSUVNBRkUpOworCiAJYWR2 a19wY2llX3NldHVwX2h3KHBjaWUpOwogCiAJcmV0ID0gYWR2a19zd19wY2lfYnJpZGdlX2luaXQo cGNpZSk7CkBAIC0xOTY5LDYgKzIwNTcsOSBAQCBzdGF0aWMgaW50IGFkdmtfcGNpZV9yZW1vdmUo c3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIAlhZHZrX3BjaWVfcmVtb3ZlX21zaV9pcnFf ZG9tYWluKHBjaWUpOwogCWFkdmtfcGNpZV9yZW1vdmVfaXJxX2RvbWFpbihwY2llKTsKIAorCS8q IERlYWN0aXZhdGUgbGluayBldmVudCB0aW1lciAqLworCWRlbF90aW1lcl9zeW5jKCZwY2llLT5s aW5rX2lycV90aW1lcik7CisKIAkvKiBGcmVlIGNvbmZpZyBzcGFjZSBmb3IgZW11bGF0ZWQgcm9v dCBicmlkZ2UgKi8KIAlwY2lfYnJpZGdlX2VtdWxfY2xlYW51cCgmcGNpZS0+YnJpZGdlKTsKIAot LSAKMi4zNS4xCgoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgtYXJtLWtlcm5lbEBsaXN0cy5p bmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8v bGludXgtYXJtLWtlcm5lbAo=