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charset=us-ascii Content-Disposition: inline Hi Shubhrajyoti, FYI, the error/warning still remains. tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.15_LTS_2022.1_update head: 789b01147d793e5a6d1c794dd0a5879ccd61bd1d commit: e7cc160039f02d71ef5a3b16038d325ad76ab59e [132/1117] clocking-wizard: Support higher frequency accuracy config: i386-randconfig-a002 (https://download.01.org/0day-ci/archive/20220824/202208242304.NpNCW92o-lkp@intel.com/config) compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/Xilinx/linux-xlnx/commit/e7cc160039f02d71ef5a3b16038d325ad76ab59e git remote add xilinx-xlnx https://github.com/Xilinx/linux-xlnx git fetch --no-tags xilinx-xlnx xlnx_rebase_v5.15_LTS_2022.1_update git checkout e7cc160039f02d71ef5a3b16038d325ad76ab59e # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot All errors (new ones prefixed by >>): >> drivers/clk/clk-xlnx-clock-wizard.c:309:8: error: implicit declaration of function 'FIELD_PREP' [-Werror,-Wimplicit-function-declaration] reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, clockout0_div) | ^ >> drivers/clk/clk-xlnx-clock-wizard.c:369:6: error: implicit declaration of function 'FIELD_GET' [-Werror,-Wimplicit-function-declaration] d = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); ^ 2 errors generated. vim +/FIELD_PREP +309 drivers/clk/clk-xlnx-clock-wizard.c 286 287 static int clk_wzrd_dynamic_all_nolock(struct clk_hw *hw, unsigned long rate, 288 unsigned long parent_rate) 289 { 290 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); 291 u32 reg, pre; 292 u32 value; 293 int err; 294 u64 vco_freq, rate_div, f, clockout0_div; 295 296 err = clk_wzrd_get_divisors(hw, rate, parent_rate); 297 if (err) 298 pr_err("failed to get divisors\n"); 299 300 vco_freq = DIV_ROUND_CLOSEST((parent_rate * divider->valuem), divider->valued); 301 rate_div = DIV_ROUND_CLOSEST((vco_freq * WZRD_FRAC_POINTS), rate); 302 303 clockout0_div = rate_div / WZRD_FRAC_POINTS; 304 305 pre = DIV_ROUND_CLOSEST((vco_freq * WZRD_FRAC_POINTS), rate); 306 f = (u32)(pre - (clockout0_div * WZRD_FRAC_POINTS)); 307 f = f & WZRD_CLKOUT_FRAC_MASK; 308 > 309 reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, clockout0_div) | 310 FIELD_PREP(WZRD_CLKOUT0_FRAC_MASK, f); 311 312 writel(reg, divider->base + WZRD_CLK_CFG_REG(2)); 313 /* Set divisor and clear phase offset */ 314 reg = FIELD_PREP(WZRD_CLKFBOUT_MULT_MASK, divider->valuem) | 315 FIELD_PREP(WZRD_DIVCLK_DIVIDE_MASK, divider->valued); 316 writel(reg, divider->base + WZRD_CLK_CFG_REG(0)); 317 writel(divider->valueo, divider->base + WZRD_CLK_CFG_REG(2)); 318 writel(0, divider->base + WZRD_CLK_CFG_REG(3)); 319 /* Check status register */ 320 err = readl_poll_timeout(divider->base + WZRD_DR_STATUS_REG_OFFSET, value, 321 value & WZRD_DR_LOCK_BIT_MASK, 322 WZRD_USEC_POLL, WZRD_TIMEOUT_POLL); 323 if (err) 324 return -ETIMEDOUT; 325 326 /* Initiate reconfiguration */ 327 writel(WZRD_DR_BEGIN_DYNA_RECONF, 328 divider->base + WZRD_DR_INIT_REG_OFFSET); 329 330 /* Check status register */ 331 err = readl_poll_timeout(divider->base + WZRD_DR_STATUS_REG_OFFSET, value, 332 value & WZRD_DR_LOCK_BIT_MASK, 333 WZRD_USEC_POLL, WZRD_TIMEOUT_POLL); 334 if (err) 335 return -ETIMEDOUT; 336 337 return 0; 338 } 339 340 static int clk_wzrd_dynamic_all(struct clk_hw *hw, unsigned long rate, 341 unsigned long parent_rate) 342 { 343 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); 344 unsigned long flags = 0; 345 int ret; 346 347 if (divider->lock) 348 spin_lock_irqsave(divider->lock, flags); 349 else 350 __acquire(divider->lock); 351 352 ret = clk_wzrd_dynamic_all_nolock(hw, rate, parent_rate); 353 354 if (divider->lock) 355 spin_unlock_irqrestore(divider->lock, flags); 356 else 357 __release(divider->lock); 358 359 return ret; 360 } 361 362 static unsigned long clk_wzrd_recalc_rate_all(struct clk_hw *hw, 363 unsigned long parent_rate) 364 { 365 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); 366 u32 m, d, o, div, reg, f; 367 368 reg = readl(divider->base + WZRD_CLK_CFG_REG(0)); > 369 d = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); 370 m = FIELD_GET(WZRD_CLKFBOUT_MULT_MASK, reg); 371 reg = readl(divider->base + WZRD_CLK_CFG_REG(2)); 372 o = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); 373 f = FIELD_GET(WZRD_CLKOUT0_FRAC_MASK, reg); 374 375 div = DIV_ROUND_CLOSEST(d * (WZRD_FRAC_POINTS * o + f), WZRD_FRAC_POINTS); 376 return divider_recalc_rate(hw, parent_rate * m, div, divider->table, 377 divider->flags, divider->width); 378 } 379 -- 0-DAY CI Kernel Test Service https://01.org/lkp From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6997FC00140 for ; Wed, 24 Aug 2022 16:05:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Subject:Cc:To: From:Date:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=7b0Q6Za/daEMRSDoHh9TgdXYfk440STZOE0pIMyHAWo=; b=ea7k6/nFP3VVTG QUPHfixnHpl+6Mk3xZYm+oE3PTOmMXwZGNV3tGhTCj3Uc9il+TzITKE2vI5o7JcQxvibPNQ+JrwRk YcsoA8nWmV8N5X7AiTShiKEqefi2XYBZXaw7l9J7MPyuPYSJC5ebMxuVeQK4Q6v5sDXo3ADOxkpXN Zk3FtGU6ARNdrvQ1B2IvHkEtovSY9uJpOe44iooNBvGCtPq+3dwdLXaaa9JyVGpcTtVC+MiB3a/ip fnmPAnxgwi/Jsos2BKU2Kn6NNHMTxU4UlX39dz8kJVH/wOfsZoIDCYYnpMAuXXhGu0MZdDG/sOqjl CwaJSED+p25Hs8eRPw3Q==; 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a="294007607" X-IronPort-AV: E=Sophos;i="5.93,260,1654585200"; d="scan'208";a="294007607" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Aug 2022 09:04:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,260,1654585200"; d="scan'208";a="586489777" Received: from lkp-server02.sh.intel.com (HELO 34e741d32628) ([10.239.97.151]) by orsmga006.jf.intel.com with ESMTP; 24 Aug 2022 09:04:19 -0700 Received: from kbuild by 34e741d32628 with local (Exim 4.96) (envelope-from ) id 1oQsra-0000j7-1u; Wed, 24 Aug 2022 16:04:18 +0000 Date: Thu, 25 Aug 2022 00:03:32 +0800 From: kernel test robot To: Shubhrajyoti Datta Cc: llvm@lists.linux.dev, kbuild-all@lists.01.org, linux-arm-kernel@lists.infradead.org, Michal Simek , Radhey Shyam Pandey Subject: [xilinx-xlnx:xlnx_rebase_v5.15_LTS_2022.1_update 132/1117] drivers/clk/clk-xlnx-clock-wizard.c:309:8: error: implicit declaration of function 'FIELD_PREP' Message-ID: <202208242304.NpNCW92o-lkp@intel.com> MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220824_090436_408774_FFF50584 X-CRM114-Status: GOOD ( 10.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Shubhrajyoti, FYI, the error/warning still remains. tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.15_LTS_2022.1_update head: 789b01147d793e5a6d1c794dd0a5879ccd61bd1d commit: e7cc160039f02d71ef5a3b16038d325ad76ab59e [132/1117] clocking-wizard: Support higher frequency accuracy config: i386-randconfig-a002 (https://download.01.org/0day-ci/archive/20220824/202208242304.NpNCW92o-lkp@intel.com/config) compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project f28c006a5895fc0e329fe15fead81e37457cb1d1) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/Xilinx/linux-xlnx/commit/e7cc160039f02d71ef5a3b16038d325ad76ab59e git remote add xilinx-xlnx https://github.com/Xilinx/linux-xlnx git fetch --no-tags xilinx-xlnx xlnx_rebase_v5.15_LTS_2022.1_update git checkout e7cc160039f02d71ef5a3b16038d325ad76ab59e # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot All errors (new ones prefixed by >>): >> drivers/clk/clk-xlnx-clock-wizard.c:309:8: error: implicit declaration of function 'FIELD_PREP' [-Werror,-Wimplicit-function-declaration] reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, clockout0_div) | ^ >> drivers/clk/clk-xlnx-clock-wizard.c:369:6: error: implicit declaration of function 'FIELD_GET' [-Werror,-Wimplicit-function-declaration] d = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); ^ 2 errors generated. vim +/FIELD_PREP +309 drivers/clk/clk-xlnx-clock-wizard.c 286 287 static int clk_wzrd_dynamic_all_nolock(struct clk_hw *hw, unsigned long rate, 288 unsigned long parent_rate) 289 { 290 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); 291 u32 reg, pre; 292 u32 value; 293 int err; 294 u64 vco_freq, rate_div, f, clockout0_div; 295 296 err = clk_wzrd_get_divisors(hw, rate, parent_rate); 297 if (err) 298 pr_err("failed to get divisors\n"); 299 300 vco_freq = DIV_ROUND_CLOSEST((parent_rate * divider->valuem), divider->valued); 301 rate_div = DIV_ROUND_CLOSEST((vco_freq * WZRD_FRAC_POINTS), rate); 302 303 clockout0_div = rate_div / WZRD_FRAC_POINTS; 304 305 pre = DIV_ROUND_CLOSEST((vco_freq * WZRD_FRAC_POINTS), rate); 306 f = (u32)(pre - (clockout0_div * WZRD_FRAC_POINTS)); 307 f = f & WZRD_CLKOUT_FRAC_MASK; 308 > 309 reg = FIELD_PREP(WZRD_CLKOUT_DIVIDE_MASK, clockout0_div) | 310 FIELD_PREP(WZRD_CLKOUT0_FRAC_MASK, f); 311 312 writel(reg, divider->base + WZRD_CLK_CFG_REG(2)); 313 /* Set divisor and clear phase offset */ 314 reg = FIELD_PREP(WZRD_CLKFBOUT_MULT_MASK, divider->valuem) | 315 FIELD_PREP(WZRD_DIVCLK_DIVIDE_MASK, divider->valued); 316 writel(reg, divider->base + WZRD_CLK_CFG_REG(0)); 317 writel(divider->valueo, divider->base + WZRD_CLK_CFG_REG(2)); 318 writel(0, divider->base + WZRD_CLK_CFG_REG(3)); 319 /* Check status register */ 320 err = readl_poll_timeout(divider->base + WZRD_DR_STATUS_REG_OFFSET, value, 321 value & WZRD_DR_LOCK_BIT_MASK, 322 WZRD_USEC_POLL, WZRD_TIMEOUT_POLL); 323 if (err) 324 return -ETIMEDOUT; 325 326 /* Initiate reconfiguration */ 327 writel(WZRD_DR_BEGIN_DYNA_RECONF, 328 divider->base + WZRD_DR_INIT_REG_OFFSET); 329 330 /* Check status register */ 331 err = readl_poll_timeout(divider->base + WZRD_DR_STATUS_REG_OFFSET, value, 332 value & WZRD_DR_LOCK_BIT_MASK, 333 WZRD_USEC_POLL, WZRD_TIMEOUT_POLL); 334 if (err) 335 return -ETIMEDOUT; 336 337 return 0; 338 } 339 340 static int clk_wzrd_dynamic_all(struct clk_hw *hw, unsigned long rate, 341 unsigned long parent_rate) 342 { 343 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); 344 unsigned long flags = 0; 345 int ret; 346 347 if (divider->lock) 348 spin_lock_irqsave(divider->lock, flags); 349 else 350 __acquire(divider->lock); 351 352 ret = clk_wzrd_dynamic_all_nolock(hw, rate, parent_rate); 353 354 if (divider->lock) 355 spin_unlock_irqrestore(divider->lock, flags); 356 else 357 __release(divider->lock); 358 359 return ret; 360 } 361 362 static unsigned long clk_wzrd_recalc_rate_all(struct clk_hw *hw, 363 unsigned long parent_rate) 364 { 365 struct clk_wzrd_divider *divider = to_clk_wzrd_divider(hw); 366 u32 m, d, o, div, reg, f; 367 368 reg = readl(divider->base + WZRD_CLK_CFG_REG(0)); > 369 d = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); 370 m = FIELD_GET(WZRD_CLKFBOUT_MULT_MASK, reg); 371 reg = readl(divider->base + WZRD_CLK_CFG_REG(2)); 372 o = FIELD_GET(WZRD_DIVCLK_DIVIDE_MASK, reg); 373 f = FIELD_GET(WZRD_CLKOUT0_FRAC_MASK, reg); 374 375 div = DIV_ROUND_CLOSEST(d * (WZRD_FRAC_POINTS * o + f), WZRD_FRAC_POINTS); 376 return divider_recalc_rate(hw, parent_rate * m, div, divider->table, 377 divider->flags, divider->width); 378 } 379 -- 0-DAY CI Kernel Test Service https://01.org/lkp _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel