All of lore.kernel.org
 help / color / mirror / Atom feed
From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 0/4] Add PMEM support for RISC-V
Date: Tue, 30 Aug 2022 10:16:38 +0530	[thread overview]
Message-ID: <20220830044642.566769-1-apatel@ventanamicro.com> (raw)

The Linux NVDIMM PEM drivers require arch support to map and access the
persistent memory device. This series adds RISC-V PMEM support using
recently added Svpbmt and Zicbom support.

These patches can also be found in riscv_pmem_v2 branch at:
https://github.com/avpatel/linux.git

Changes since v1:
 - Fix error reported by test bot
   https://lore.kernel.org/all/202208272028.IwrNZ0Ur-lkp@intel.com/

Anup Patel (4):
  RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt
  RISC-V: Move riscv_init_cbom_blocksize() to cacheflush.c
  RISC-V: Implement arch specific PMEM APIs
  RISC-V: Enable PMEM drivers

 arch/riscv/Kconfig                  |  1 +
 arch/riscv/configs/defconfig        |  1 +
 arch/riscv/include/asm/cacheflush.h |  2 ++
 arch/riscv/include/asm/io.h         | 10 ++++++++
 arch/riscv/include/asm/pgtable.h    |  2 ++
 arch/riscv/mm/Makefile              |  1 +
 arch/riscv/mm/cacheflush.c          | 39 +++++++++++++++++++++++++++++
 arch/riscv/mm/dma-noncoherent.c     | 38 ----------------------------
 arch/riscv/mm/pmem.c                | 21 ++++++++++++++++
 9 files changed, 77 insertions(+), 38 deletions(-)
 create mode 100644 arch/riscv/mm/pmem.c

-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>
Cc: Atish Patra <atishp@atishpatra.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Anup Patel <anup@brainfault.org>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 0/4] Add PMEM support for RISC-V
Date: Tue, 30 Aug 2022 10:16:38 +0530	[thread overview]
Message-ID: <20220830044642.566769-1-apatel@ventanamicro.com> (raw)

The Linux NVDIMM PEM drivers require arch support to map and access the
persistent memory device. This series adds RISC-V PMEM support using
recently added Svpbmt and Zicbom support.

These patches can also be found in riscv_pmem_v2 branch at:
https://github.com/avpatel/linux.git

Changes since v1:
 - Fix error reported by test bot
   https://lore.kernel.org/all/202208272028.IwrNZ0Ur-lkp@intel.com/

Anup Patel (4):
  RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt
  RISC-V: Move riscv_init_cbom_blocksize() to cacheflush.c
  RISC-V: Implement arch specific PMEM APIs
  RISC-V: Enable PMEM drivers

 arch/riscv/Kconfig                  |  1 +
 arch/riscv/configs/defconfig        |  1 +
 arch/riscv/include/asm/cacheflush.h |  2 ++
 arch/riscv/include/asm/io.h         | 10 ++++++++
 arch/riscv/include/asm/pgtable.h    |  2 ++
 arch/riscv/mm/Makefile              |  1 +
 arch/riscv/mm/cacheflush.c          | 39 +++++++++++++++++++++++++++++
 arch/riscv/mm/dma-noncoherent.c     | 38 ----------------------------
 arch/riscv/mm/pmem.c                | 21 ++++++++++++++++
 9 files changed, 77 insertions(+), 38 deletions(-)
 create mode 100644 arch/riscv/mm/pmem.c

-- 
2.34.1


             reply	other threads:[~2022-08-30  4:47 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-30  4:46 Anup Patel [this message]
2022-08-30  4:46 ` [PATCH v2 0/4] Add PMEM support for RISC-V Anup Patel
2022-08-30  4:46 ` [PATCH v2 1/4] RISC-V: Fix ioremap_cache() and ioremap_wc() for systems with Svpbmt Anup Patel
2022-08-30  4:46   ` Anup Patel
2022-09-01 15:25   ` Heiko Stübner
2022-09-01 15:25     ` Heiko Stübner
2022-09-01 16:07   ` Conor.Dooley
2022-09-01 16:07     ` Conor.Dooley
2022-09-09  8:10   ` Anup Patel
2022-09-09  8:10     ` Anup Patel
2022-09-16  2:24   ` Anup Patel
2022-09-16  2:24     ` Anup Patel
2022-09-22 16:35     ` Palmer Dabbelt
2022-09-22 16:35       ` Palmer Dabbelt
2022-09-23 10:35       ` Arnd Bergmann
2022-09-23 10:35         ` Arnd Bergmann
2022-09-23 10:45         ` Palmer Dabbelt
2022-09-23 10:45           ` Palmer Dabbelt
2022-09-28 12:14       ` Christoph Hellwig
2022-09-28 12:14         ` Christoph Hellwig
2022-10-07  3:50         ` Palmer Dabbelt
2022-10-07  3:50           ` Palmer Dabbelt
2022-10-07  5:34           ` Anup Patel
2022-10-07  5:34             ` Anup Patel
2022-08-30  4:46 ` [PATCH v2 2/4] RISC-V: Move riscv_init_cbom_blocksize() to cacheflush.c Anup Patel
2022-08-30  4:46   ` Anup Patel
2022-09-01 15:29   ` Heiko Stübner
2022-09-01 15:29     ` Heiko Stübner
2022-09-01 15:49     ` Conor.Dooley
2022-09-01 15:49       ` Conor.Dooley
2022-08-30  4:46 ` [PATCH v2 3/4] RISC-V: Implement arch specific PMEM APIs Anup Patel
2022-08-30  4:46   ` Anup Patel
2022-09-01 15:38   ` Heiko Stübner
2022-09-01 15:38     ` Heiko Stübner
2022-09-03 16:03     ` Anup Patel
2022-09-03 16:03       ` Anup Patel
2022-08-30  4:46 ` [PATCH v2 4/4] RISC-V: Enable PMEM drivers Anup Patel
2022-08-30  4:46   ` Anup Patel
2022-09-01 16:11   ` Conor.Dooley
2022-09-01 16:11     ` Conor.Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220830044642.566769-1-apatel@ventanamicro.com \
    --to=apatel@ventanamicro.com \
    --cc=anup@brainfault.org \
    --cc=atishp@atishpatra.org \
    --cc=heiko@sntech.de \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.