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From: Rob Herring <robh@kernel.org>
To: Richard Acayan <mailingradian@gmail.com>
Cc: bjorn.andersson@linaro.org, agross@kernel.org,
	konrad.dybcio@somainline.org, mturquette@baylibre.com,
	sboyd@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	tdas@codeaurora.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	~postmarketos/upstreaming@lists.sr.ht, caleb@connolly.tech,
	jo@jsfamily.in
Subject: Re: [PATCH 1/3] dt-bindings: clock: gcc-sdm845: add sdm670 global clocks
Date: Wed, 7 Sep 2022 12:53:00 -0500	[thread overview]
Message-ID: <20220907175300.GA3779566-robh@kernel.org> (raw)
In-Reply-To: <20220907025035.15609-2-mailingradian@gmail.com>

On Tue, Sep 06, 2022 at 10:50:33PM -0400, Richard Acayan wrote:
> The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most
> of the new clocks, GDSCs, and resets already have reserved IDs but there
> are some resources that don't. Add the new clock and extra BCR from
> Snapdragon 670 and document the differences between the SoC parent clocks.
> 
> Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> ---
>  .../bindings/clock/qcom,gcc-sdm845.yaml       | 24 +++++++++++++++----
>  include/dt-bindings/clock/qcom,gcc-sdm845.h   |  2 ++
>  2 files changed, 21 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/defaced/bindings/clock/qcom,gcc-sdm845.yaml
> index daf7906ebc40..ba94dd32e619 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
> @@ -19,23 +19,21 @@ description: |
>  
>  properties:
>    compatible:
> -    const: qcom,gcc-sdm845
> +    enum:
> +      - qcom,gcc-sdm670
> +      - qcom,gcc-sdm845
>  
>    clocks:
>      items:
>        - description: Board XO source
>        - description: Board active XO source
>        - description: Sleep clock source
> -      - description: PCIE 0 Pipe clock source
> -      - description: PCIE 1 Pipe clock source

You just changed the clocks from 5 to 3. Please test your changes:

/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clocks: [[4294967295, 0], [4294967295, 1], [4294967295], [4294967295], [4294967295]] is too long
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk', 'pcie_0_pipe_clk', 'pcie_1_pipe_clk'] is too long
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clocks: [[4294967295, 0], [4294967295, 1], [4294967295], [4294967295], [4294967295]] is too long
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names:0: 'pcie_0_pipe_clk' was expected
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names:1: 'pcie_1_pipe_clk' was expected
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.example.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk', 'pcie_0_pipe_clk', 'pcie_1_pipe_clk'] is too long
	From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml

What you want here I think is 'minItems: 3' and then restrict the clocks 
to 3 or 5 in the if/then schema.

Rob

  reply	other threads:[~2022-09-07 17:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-07  2:50 [PATCH 0/3] SDM670 Global Clocks Richard Acayan
2022-09-07  2:50 ` [PATCH 1/3] dt-bindings: clock: gcc-sdm845: add sdm670 global clocks Richard Acayan
2022-09-07 17:53   ` Rob Herring [this message]
2022-09-07 22:18     ` Richard Acayan
2022-09-07  2:50 ` [PATCH 2/3] clk: qcom: gcc-sdm845: use device tree match data Richard Acayan
2022-09-07  2:50 ` [PATCH 3/3] clk: qcom: gcc-sdm845: add sdm670 global clock data Richard Acayan
2022-09-07 14:18   ` kernel test robot

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