From: Rob Herring <robh@kernel.org>
To: Sean Anderson <sean.anderson@seco.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, Rob Herring <robh+dt@kernel.org>,
linux-phy@lists.infradead.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Madalin Bucur <madalin.bucur@nxp.com>,
linux-clk@vger.kernel.org, Ioana Ciornei <ioana.ciornei@nxp.com>
Subject: Re: [PATCH v5 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs
Date: Mon, 12 Sep 2022 14:50:38 -0500 [thread overview]
Message-ID: <20220912195038.GA1724641-robh@kernel.org> (raw)
In-Reply-To: <20220902213721.946138-4-sean.anderson@seco.com>
On Fri, 02 Sep 2022 17:37:16 -0400, Sean Anderson wrote:
> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
> with assigned-clock* to specify a particular frequency to use. For
> example, to set the second PLL (at offset 0x20)'s frequency, use
> LYNX10G_PLLa(1). These are for use only in the device tree, and are not
> otherwise used by the driver.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v5:
> - Update commit description
> - Dual id header
>
> Changes in v4:
> - New
>
> include/dt-bindings/clock/fsl,lynx-10g.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
> create mode 100644 include/dt-bindings/clock/fsl,lynx-10g.h
>
Acked-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Sean Anderson <sean.anderson@seco.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, Rob Herring <robh+dt@kernel.org>,
linux-phy@lists.infradead.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Madalin Bucur <madalin.bucur@nxp.com>,
linux-clk@vger.kernel.org, Ioana Ciornei <ioana.ciornei@nxp.com>
Subject: Re: [PATCH v5 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs
Date: Mon, 12 Sep 2022 14:50:38 -0500 [thread overview]
Message-ID: <20220912195038.GA1724641-robh@kernel.org> (raw)
In-Reply-To: <20220902213721.946138-4-sean.anderson@seco.com>
On Fri, 02 Sep 2022 17:37:16 -0400, Sean Anderson wrote:
> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
> with assigned-clock* to specify a particular frequency to use. For
> example, to set the second PLL (at offset 0x20)'s frequency, use
> LYNX10G_PLLa(1). These are for use only in the device tree, and are not
> otherwise used by the driver.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v5:
> - Update commit description
> - Dual id header
>
> Changes in v4:
> - New
>
> include/dt-bindings/clock/fsl,lynx-10g.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
> create mode 100644 include/dt-bindings/clock/fsl,lynx-10g.h
>
Acked-by: Rob Herring <robh@kernel.org>
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Sean Anderson <sean.anderson@seco.com>
Cc: devicetree@vger.kernel.org, Madalin Bucur <madalin.bucur@nxp.com>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Ioana Ciornei <ioana.ciornei@nxp.com>,
linux-phy@lists.infradead.org, linuxppc-dev@lists.ozlabs.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs
Date: Mon, 12 Sep 2022 14:50:38 -0500 [thread overview]
Message-ID: <20220912195038.GA1724641-robh@kernel.org> (raw)
In-Reply-To: <20220902213721.946138-4-sean.anderson@seco.com>
On Fri, 02 Sep 2022 17:37:16 -0400, Sean Anderson wrote:
> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
> with assigned-clock* to specify a particular frequency to use. For
> example, to set the second PLL (at offset 0x20)'s frequency, use
> LYNX10G_PLLa(1). These are for use only in the device tree, and are not
> otherwise used by the driver.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v5:
> - Update commit description
> - Dual id header
>
> Changes in v4:
> - New
>
> include/dt-bindings/clock/fsl,lynx-10g.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
> create mode 100644 include/dt-bindings/clock/fsl,lynx-10g.h
>
Acked-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Sean Anderson <sean.anderson@seco.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
Camelia Alexandra Groza <camelia.groza@nxp.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, Rob Herring <robh+dt@kernel.org>,
linux-phy@lists.infradead.org,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Vinod Koul <vkoul@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Madalin Bucur <madalin.bucur@nxp.com>,
linux-clk@vger.kernel.org, Ioana Ciornei <ioana.ciornei@nxp.com>
Subject: Re: [PATCH v5 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs
Date: Mon, 12 Sep 2022 14:50:38 -0500 [thread overview]
Message-ID: <20220912195038.GA1724641-robh@kernel.org> (raw)
In-Reply-To: <20220902213721.946138-4-sean.anderson@seco.com>
On Fri, 02 Sep 2022 17:37:16 -0400, Sean Anderson wrote:
> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
> with assigned-clock* to specify a particular frequency to use. For
> example, to set the second PLL (at offset 0x20)'s frequency, use
> LYNX10G_PLLa(1). These are for use only in the device tree, and are not
> otherwise used by the driver.
>
> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
> ---
>
> Changes in v5:
> - Update commit description
> - Dual id header
>
> Changes in v4:
> - New
>
> include/dt-bindings/clock/fsl,lynx-10g.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
> create mode 100644 include/dt-bindings/clock/fsl,lynx-10g.h
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-12 19:50 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-02 21:37 [PATCH v5 0/8] phy: Add support for Lynx 10G SerDes Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` [PATCH v5 1/8] dt-bindings: phy: Add 2500BASE-X and 10GBASE-R Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-12 19:49 ` Rob Herring
2022-09-12 19:49 ` Rob Herring
2022-09-12 19:49 ` Rob Herring
2022-09-12 19:49 ` Rob Herring
2022-09-02 21:37 ` [PATCH v5 2/8] dt-bindings: phy: Add Lynx 10G phy binding Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-12 19:46 ` Rob Herring
2022-09-12 19:46 ` Rob Herring
2022-09-12 19:46 ` Rob Herring
2022-09-12 19:46 ` Rob Herring
2022-09-02 21:37 ` [PATCH v5 3/8] dt-bindings: clock: Add ids for Lynx 10g PLLs Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-12 19:50 ` Rob Herring [this message]
2022-09-12 19:50 ` Rob Herring
2022-09-12 19:50 ` Rob Herring
2022-09-12 19:50 ` Rob Herring
2022-09-02 21:37 ` [PATCH v5 4/8] phy: fsl: Add Lynx 10G SerDes driver Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-03 15:23 ` kernel test robot
2022-09-03 15:23 ` kernel test robot
2022-09-03 15:23 ` kernel test robot
2022-09-03 15:23 ` kernel test robot
2022-09-06 16:33 ` Sean Anderson
2022-09-06 16:33 ` Sean Anderson
2022-09-06 16:33 ` Sean Anderson
2022-09-06 16:33 ` Sean Anderson
2022-09-06 16:33 ` Sean Anderson
2022-09-02 21:37 ` [PATCH v5 5/8] arm64: dts: ls1046a: Add serdes bindings Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` [PATCH v5 6/8] arm64: dts: ls1088a: " Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` [PATCH v5 7/8] arm64: dts: ls1046ardb: " Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` [PATCH v5 8/8] [WIP] arm64: dts: ls1088ardb: " Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-02 21:37 ` Sean Anderson
2022-09-09 15:05 ` [PATCH v5 0/8] phy: Add support for Lynx 10G SerDes Sean Anderson
2022-09-09 15:05 ` Sean Anderson
2022-09-09 15:05 ` Sean Anderson
2022-09-09 15:05 ` Sean Anderson
2022-09-13 17:44 ` Vinod Koul
2022-09-13 17:44 ` Vinod Koul
2022-09-13 17:44 ` Vinod Koul
2022-09-13 17:44 ` Vinod Koul
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