From: Kautuk Consul <kconsul@ventanamicro.com>
To: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>,
Sean Anderson <sean.anderson@seco.com>,
Rick Chen <rick@andestech.com>, Leo <ycliang@andestech.com>,
Simon Glass <sjg@chromium.org>,
Heinrich Schuchardt <xypron.glpk@gmx.de>,
Ilias Apalodimas <ilias.apalodimas@linaro.org>,
Alexandru Gagniuc <mr.nuke.me@gmail.com>,
Philippe Reynes <philippe.reynes@softathome.com>,
Rasmus Villemoes <rasmus.villemoes@prevas.dk>,
Stefan Roese <sr@denx.de>, Loic Poulain <loic.poulain@linaro.org>,
Bin Meng <bmeng.cn@gmail.com>
Cc: u-boot@lists.denx.de, Kautuk Consul <kconsul@ventanamicro.com>
Subject: [PATCH v4 0/3] Add riscv semihosting support in u-boot
Date: Mon, 19 Sep 2022 17:19:05 +0530 [thread overview]
Message-ID: <20220919114908.2780149-1-kconsul@ventanamicro.com> (raw)
Semihosting is a mechanism that enables code running on
a target to communicate and use the Input/Output
facilities on a host computer that is running a debugger.
This patchset adds support for semihosting in u-boot
for RISCV64 targets.
CHANGES since v2 and v3:
- v2: Move the arch/arm/Kconfig common *SEMIHOSTING* config
options from arch/arm/Kconfig to lib/Kconfig.
- v2: Improve the *SEMIHOSTING_FALLBACK config options in
lib/Kconfig to depend on RISCV or ARM64.
- v2: Remove the arch/riscv/include/asm/semhosting.h file.
- v2: Improve the arch/riscv/lib/semihosting.c by removing the
jump statement and moving the .align 4 to before the 2
.option directives.
- v3: Additionally check for the RISCV config option in the "depends"
of the SPL_SEMIHOSTING_FALLBACK config option in lib/Kconfig.
Compilation and test commands for SPL and S-mode configurations
=================================================================
U-Boot S-mode on QEMU virt
----------------------------
// Compilation of S-mode u-boot
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_smode_defconfig
make
// Run riscv 64-bit u-boot with opensbi on qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
u-boot/u-boot.bin
U-Boot SPL on QEMU virt
------------------------
// Compilation of u-boot-spl
ARCH=riscv
CROSS_COMPILE=riscv64-unknown-linux-gnu-
make qemu-riscv64_spl_defconfig
make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
// Run 64-bit u-boot-spl in qemu
qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
u-boot/spl/u-boot-spl.bin -device\
loader,file=u-boot/u-boot.itb,addr=0x80200000
Kautuk Consul (3):
lib: Add common semihosting library
arch/riscv: add semihosting support for RISC-V
board: qemu-riscv: enable semihosting
arch/arm/Kconfig | 46 -------
arch/arm/lib/semihosting.c | 181 +-------------------------
arch/riscv/include/asm/spl.h | 1 +
arch/riscv/lib/Makefile | 2 +
arch/riscv/lib/interrupts.c | 11 ++
arch/riscv/lib/semihosting.c | 24 ++++
configs/qemu-riscv32_defconfig | 4 +
configs/qemu-riscv32_smode_defconfig | 4 +
configs/qemu-riscv32_spl_defconfig | 7 +
configs/qemu-riscv64_defconfig | 4 +
configs/qemu-riscv64_smode_defconfig | 4 +
configs/qemu-riscv64_spl_defconfig | 7 +
include/semihosting.h | 11 ++
lib/Kconfig | 46 +++++++
lib/Makefile | 2 +
lib/semihosting.c | 186 +++++++++++++++++++++++++++
16 files changed, 314 insertions(+), 226 deletions(-)
create mode 100644 arch/riscv/lib/semihosting.c
create mode 100644 lib/semihosting.c
--
2.34.1
next reply other threads:[~2022-09-19 11:49 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-19 11:49 Kautuk Consul [this message]
2022-09-19 11:49 ` [PATCH v4 1/3] lib: Add common semihosting library Kautuk Consul
2022-09-22 9:02 ` Leo Liang
2022-09-22 17:00 ` Sean Anderson
2022-09-23 4:39 ` Kautuk Consul
2022-09-19 11:49 ` [PATCH v4 2/3] arch/riscv: add semihosting support for RISC-V Kautuk Consul
2022-09-22 9:03 ` Leo Liang
2022-09-22 17:05 ` Sean Anderson
2022-09-23 4:57 ` Kautuk Consul
2022-09-19 11:49 ` [PATCH v4 3/3] board: qemu-riscv: enable semihosting Kautuk Consul
2022-09-22 9:03 ` Leo Liang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220919114908.2780149-1-kconsul@ventanamicro.com \
--to=kconsul@ventanamicro.com \
--cc=bmeng.cn@gmail.com \
--cc=ilias.apalodimas@linaro.org \
--cc=loic.poulain@linaro.org \
--cc=mr.nuke.me@gmail.com \
--cc=philippe.reynes@softathome.com \
--cc=rasmus.villemoes@prevas.dk \
--cc=rayagonda.kokatanur@broadcom.com \
--cc=rick@andestech.com \
--cc=sean.anderson@seco.com \
--cc=sjg@chromium.org \
--cc=sr@denx.de \
--cc=u-boot@lists.denx.de \
--cc=xypron.glpk@gmx.de \
--cc=ycliang@andestech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.