From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Joel Stanley <joel@jms.id.au>, buildroot@buildroot.org
Subject: Re: [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16
Date: Mon, 26 Sep 2022 14:03:33 +0200 [thread overview]
Message-ID: <20220926140333.3719371b@windsurf> (raw)
In-Reply-To: <20220925132218.3848758-1-clg@kaod.org>
On Sun, 25 Sep 2022 15:22:18 +0200
Cédric Le Goater <clg@kaod.org> wrote:
> The features of the Cortex A7 CPU on the Aspeed AST2600 A3 SoC are :
>
> half thumb fastmult vfp edsp vfpv3 vfpv3d16 tls vfpv4 idiva idivt lpae evtstrm
>
> the vfpv3d16 feature bit is common to both vfpv3 and vfpv4.
>
> Drop BR2_ARM_FPU_VFPV4 which activates the use of vpfd32 (and breaks
> user space). Set BR2_ARM_FPU_VFPV4D16 instead.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
> configs/aspeed_ast2600evb_defconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to master, thanks.
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2022-09-26 12:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-25 13:22 [Buildroot] [PATCH] configs/aspeed_ast2600evb: Set BR2_ARM_FPU_VFPV4D16 Cédric Le Goater
2022-09-25 13:26 ` Cédric Le Goater
2022-09-26 12:03 ` Thomas Petazzoni [this message]
2022-10-12 15:41 ` Peter Korsgaard
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