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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id kz22-20020a17090777d600b00730979f568fsm488578ejc.150.2022.09.27.02.17.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Sep 2022 02:17:12 -0700 (PDT) Date: Tue, 27 Sep 2022 11:17:11 +0200 From: Igor Mammedov To: Peter Xu Cc: qemu-devel@nongnu.org, "Michael S . Tsirkin" , Paolo Bonzini , Jason Wang , David Woodhouse , Claudio Fontana Subject: Re: [PATCH v2] Revert "intel_iommu: Fix irqchip / X2APIC configuration checks" Message-ID: <20220927111711.4307af92@redhat.com> In-Reply-To: <20220926153206.10881-1-peterx@redhat.com> References: <20220926153206.10881-1-peterx@redhat.com> X-Mailer: Claws Mail 4.1.0 (GTK 3.24.34; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.082, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, 26 Sep 2022 11:32:06 -0400 Peter Xu wrote: > It's true that when vcpus<=255 we don't require the length of 32bit APIC > IDs. However here since we already have EIM=ON it means the hypervisor > will declare the VM as x2apic supported (e.g. VT-d ECAP register will have > EIM bit 4 set), so the guest should assume the APIC IDs are 32bits width > even if vcpus<=255. In short, commit 77250171bdc breaks any simple cmdline > that wants to boot a VM with >=9 but <=255 vcpus with: > > -device intel-iommu,intremap=on > > For anyone who does not want to enable x2apic, we can use eim=off in the > intel-iommu parameters to skip enabling KVM x2apic. > > This partly reverts commit 77250171bdc02aee106083fd2a068147befa1a38, while > keeping the valid bit on checking split irqchip, but revert the other change. > > One thing to mention is that this patch may break migration compatibility > of such VM, however that's probably the best thing we can do, because the > old behavior was simply wrong and not working for >8 vcpus. For <=8 vcpus, > there could be a light guest ABI change (by enabling KVM x2apic after this > patch), but logically it shouldn't affect the migration from working. > > Also, this is not the 1st commit to change x2apic behavior. Igor provided > a full history of how this evolved for the past few years: > > https://lore.kernel.org/qemu-devel/20220922154617.57d1a1fb@redhat.com/ > > Relevant commits for reference: > > fb506e701e ("intel_iommu: reject broken EIM", 2016-10-17) > c1bb5418e3 ("target/i386: Support up to 32768 CPUs without IRQ remapping", 2020-12-10) > 77250171bd ("intel_iommu: Fix irqchip / X2APIC configuration checks", 2022-05-16) > dc89f32d92 ("target/i386: Fix sanity check on max APIC ID / X2APIC enablement", 2022-05-16) > > We may want to have this for stable too (mostly for 7.1.0 only). Adding a > fixes tag. > > Cc: David Woodhouse > Cc: Claudio Fontana > Cc: Igor Mammedov > Fixes: 77250171bd ("intel_iommu: Fix irqchip / X2APIC configuration checks") > Signed-off-by: Peter Xu Reviewed-by: Igor Mammedov > --- > v2: > - Added some more information into commit message [Igor] > --- > hw/i386/intel_iommu.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c > index 05d53a1aa9..6524c2ee32 100644 > --- a/hw/i386/intel_iommu.c > +++ b/hw/i386/intel_iommu.c > @@ -3818,6 +3818,11 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp) > error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split"); > return false; > } > + if (!kvm_enable_x2apic()) { > + error_setg(errp, "eim=on requires support on the KVM side" > + "(X2APIC_API, first shipped in v4.7)"); > + return false; > + } > } > > /* Currently only address widths supported are 39 and 48 bits */