From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EE310C6FA83 for ; Tue, 27 Sep 2022 14:20:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230444AbiI0OUG (ORCPT ); Tue, 27 Sep 2022 10:20:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232057AbiI0OTy (ORCPT ); Tue, 27 Sep 2022 10:19:54 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D643979FF for ; Tue, 27 Sep 2022 07:19:40 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 7229EB81C01 for ; Tue, 27 Sep 2022 14:19:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8122FC433C1; Tue, 27 Sep 2022 14:19:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664288377; bh=PUps/ldFkt1/yI6ZmwNvDNq7YAuTSGdZNC88IA2kSQk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YY7vZap89PBZyec+jMI/NGAhNvUYS9qfnkV7j3mcoBw/lfgS9yHkMvQ5SFGDOVqwH I6L+zLrrMY9JKRxBuBiqy0IJjLzpAqHmAKVEP3eU2QXHs6FjHcTZxwK10L3SZr0gTW oF/U4kzwL8lY0/zzvLwGGIyMh9mx8GLPuRO1QwUdxfkQGn54aN1SvCeft0adKCxpYC aYS1FoA5koY7GS/LUteWRKL8p1IxJ38bmuXHzgIDga/FHsv8GwOgk+PW7jCf7b1Q8T eHUQs/ZqYjHChb8846B4C07EJ6Tv/cIiH9da1IUqp+5dZxLe1PaO3m1wuOD+7hK7wN xSRoiPiXHxxGg== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Lorenzo Pieralisi Cc: Bjorn Helgaas , Gregory CLEMENT , pali@kernel.org, =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH v2 03/10] PCI: aardvark: Send Set_Slot_Power_Limit message Date: Tue, 27 Sep 2022 16:19:19 +0200 Message-Id: <20220927141926.8895-4-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220927141926.8895-1-kabel@kernel.org> References: <20220927141926.8895-1-kabel@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Pali Rohár Emulate Slot PowerLimit Scale and Value bits in the Slot Capabilities register of the emulated bridge and if slot power limit value is defined, send that Set_Slot_Power_Limit message via Message Generation Control Register in Link Up handler on link up event. Slot power limit value is read from device-tree property 'slot-power-limit-milliwatt'. If this property is not specified, we treat it as "Slot Capabilities register has not yet been initialized". According to PCIe Base specification 3.0, when transitioning from a non-DL_Up Status to a DL_Up Status, the Port must initiate the transmission of a Set_Slot_Power_Limit Message to the other component on the Link to convey the value programmed in the Slot Power Limit Scale and Value fields of the Slot Capabilities register. This transmission is optional if the Slot Capabilities register has not yet been initialized. Signed-off-by: Pali Rohár Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 51 ++++++++++++++++++++++++--- 1 file changed, 47 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 31da28ebc5d1..03e318bc171f 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -213,6 +213,11 @@ enum { }; #define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) +#define PME_MSG_GEN_CTRL (LMI_BASE_ADDR + 0x220) +#define SEND_SET_SLOT_POWER_LIMIT BIT(13) +#define SEND_PME_TURN_OFF BIT(14) +#define SLOT_POWER_LIMIT_DATA_SHIFT 16 +#define SLOT_POWER_LIMIT_DATA_MASK GENMASK(25, 16) /* PCIe core controller registers */ #define CTRL_CORE_BASE_ADDR 0x18000 @@ -285,6 +290,8 @@ struct advk_pcie { raw_spinlock_t msi_irq_lock; DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); struct mutex msi_used_lock; + u8 slot_power_limit_value; + u8 slot_power_limit_scale; int link_gen; bool link_was_up; struct timer_list link_irq_timer; @@ -317,8 +324,9 @@ static inline bool advk_pcie_link_up(struct advk_pcie *pcie) { /* check if LTSSM is in normal operation - some L* state */ u8 ltssm_state = advk_pcie_ltssm_state(pcie); + u16 slotsta, slotctl; + u32 slotpwr, val; bool link_is_up; - u16 slotsta; link_is_up = ltssm_state >= LTSSM_L0 && ltssm_state < LTSSM_DISABLED; @@ -332,6 +340,27 @@ static inline bool advk_pcie_link_up(struct advk_pcie *pcie) pcie->bridge.pcie_conf.slotsta = cpu_to_le16(slotsta); mod_timer(&pcie->link_irq_timer, jiffies + 1); + + /* + * According to PCIe Base specification 3.0, when transitioning + * from a non-DL_Up Status to a DL_Up Status, the Port must + * initiate the transmission of a Set_Slot_Power_Limit Message + * to the other component on the Link to convey the value + * programmed in the Slot Power Limit Scale and Value fields of + * the Slot Capabilities register. This transmission is optional + * if the Slot Capabilities register has not yet been + * initialized. + */ + slotctl = le16_to_cpu(pcie->bridge.pcie_conf.slotctl); + slotpwr = FIELD_GET(PCI_EXP_SLTCAP_SPLV | PCI_EXP_SLTCAP_SPLS, + le32_to_cpu(pcie->bridge.pcie_conf.slotcap)); + if (!(slotctl & PCI_EXP_SLTCTL_ASPL_DISABLE) && slotpwr) { + val = advk_readl(pcie, PME_MSG_GEN_CTRL); + val &= ~SLOT_POWER_LIMIT_DATA_MASK; + val |= slotpwr << SLOT_POWER_LIMIT_DATA_SHIFT; + val |= SEND_SET_SLOT_POWER_LIMIT; + advk_writel(pcie, val, PME_MSG_GEN_CTRL); + } } return link_is_up; @@ -944,8 +973,9 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge, case PCI_EXP_SLTCTL: { u16 slotctl = le16_to_cpu(bridge->pcie_conf.slotctl); - /* Only emulation of HPIE and DLLSCE bits is provided */ - slotctl &= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_DLLSCE; + /* Only emulation of HPIE, DLLSCE and ASPLD bits is provided */ + slotctl &= PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_DLLSCE | + PCI_EXP_SLTCTL_ASPL_DISABLE; bridge->pcie_conf.slotctl = cpu_to_le16(slotctl); break; } @@ -1109,9 +1139,13 @@ static int advk_sw_pci_bridge_init(struct advk_pcie *pcie) * Set physical slot number to 1 since there is only one port and zero * value is reserved for ports within the same silicon as Root Port * which is not our case. + * + * Set slot power limit. */ slotcap = PCI_EXP_SLTCAP_NCCS | PCI_EXP_SLTCAP_HPC | - FIELD_PREP(PCI_EXP_SLTCAP_PSN, 1); + FIELD_PREP(PCI_EXP_SLTCAP_PSN, 1) | + FIELD_PREP(PCI_EXP_SLTCAP_SPLV, pcie->slot_power_limit_value) | + FIELD_PREP(PCI_EXP_SLTCAP_SPLS, pcie->slot_power_limit_scale); bridge->pcie_conf.slotcap = cpu_to_le32(slotcap); bridge->pcie_conf.slotsta = cpu_to_le16(PCI_EXP_SLTSTA_PDS); @@ -1837,6 +1871,7 @@ static int advk_pcie_probe(struct platform_device *pdev) struct advk_pcie *pcie; struct pci_host_bridge *bridge; struct resource_entry *entry; + u32 slot_power_limit; int ret, irq; bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie)); @@ -1957,6 +1992,14 @@ static int advk_pcie_probe(struct platform_device *pdev) else pcie->link_gen = ret; + slot_power_limit = of_pci_get_slot_power_limit(dev->of_node, + &pcie->slot_power_limit_value, + &pcie->slot_power_limit_scale); + if (slot_power_limit) + dev_info(dev, "Slot Power Limit: %u.%uW\n", + slot_power_limit / 1000, + (slot_power_limit / 100) % 10); + ret = advk_pcie_setup_phy(pcie); if (ret) return ret; -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECAB9C54EE9 for ; Tue, 27 Sep 2022 14:21:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Zyn61S0k79yknZ+BoGqKT8m6mBJHtAL8dSmzhxiRiYI=; b=g1bdOOCmB4r/85 OXhrStcSxR3x7x/xUKJ0wXe32QskZFbLIjbT+V6u1431GZxrghBjpCcFegWK8w7I9GzatLe7r6Scd 4hXW0xBPypIONO1ppuAFni846uLeQ3nHlV4AGcHd6ifeuvcWNMbsDLf7cp94VlLwp79HMpl61JFRV ZxTwxksFI9XY1hPpKdmqsmfRllHPoR/ok1Wc+UUSZzTXs79XhZ23j7gK64PYoQTbcGqcBPbEDPaSl Wi8Nij+GNfhh/JfEFBacaobc8QxN733Hlz5QJZr2nx4IoUCadYLYB117WC4KfT0GBnOgNIcFysjnG mXfrFU0A0j7ZKFV1BsgQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1odBRO-00BBBQ-H2; Tue, 27 Sep 2022 14:20:06 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1odBQw-00BB1g-DD for linux-arm-kernel@lists.infradead.org; Tue, 27 Sep 2022 14:19:40 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 9BF13619FE; Tue, 27 Sep 2022 14:19:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8122FC433C1; Tue, 27 Sep 2022 14:19:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664288377; bh=PUps/ldFkt1/yI6ZmwNvDNq7YAuTSGdZNC88IA2kSQk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YY7vZap89PBZyec+jMI/NGAhNvUYS9qfnkV7j3mcoBw/lfgS9yHkMvQ5SFGDOVqwH I6L+zLrrMY9JKRxBuBiqy0IJjLzpAqHmAKVEP3eU2QXHs6FjHcTZxwK10L3SZr0gTW oF/U4kzwL8lY0/zzvLwGGIyMh9mx8GLPuRO1QwUdxfkQGn54aN1SvCeft0adKCxpYC aYS1FoA5koY7GS/LUteWRKL8p1IxJ38bmuXHzgIDga/FHsv8GwOgk+PW7jCf7b1Q8T eHUQs/ZqYjHChb8846B4C07EJ6Tv/cIiH9da1IUqp+5dZxLe1PaO3m1wuOD+7hK7wN xSRoiPiXHxxGg== From: =?UTF-8?q?Marek=20Beh=C3=BAn?= To: Lorenzo Pieralisi Cc: Bjorn Helgaas , Gregory CLEMENT , pali@kernel.org, =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?UTF-8?q?Marek=20Beh=C3=BAn?= Subject: [PATCH v2 03/10] PCI: aardvark: Send Set_Slot_Power_Limit message Date: Tue, 27 Sep 2022 16:19:19 +0200 Message-Id: <20220927141926.8895-4-kabel@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220927141926.8895-1-kabel@kernel.org> References: <20220927141926.8895-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220927_071938_564451_07AC1672 X-CRM114-Status: GOOD ( 20.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org RnJvbTogUGFsaSBSb2jDoXIgPHBhbGlAa2VybmVsLm9yZz4KCkVtdWxhdGUgU2xvdCBQb3dlckxp bWl0IFNjYWxlIGFuZCBWYWx1ZSBiaXRzIGluIHRoZSBTbG90IENhcGFiaWxpdGllcwpyZWdpc3Rl ciBvZiB0aGUgZW11bGF0ZWQgYnJpZGdlIGFuZCBpZiBzbG90IHBvd2VyIGxpbWl0IHZhbHVlIGlz CmRlZmluZWQsIHNlbmQgdGhhdCBTZXRfU2xvdF9Qb3dlcl9MaW1pdCBtZXNzYWdlIHZpYSBNZXNz YWdlIEdlbmVyYXRpb24KQ29udHJvbCBSZWdpc3RlciBpbiBMaW5rIFVwIGhhbmRsZXIgb24gbGlu ayB1cCBldmVudC4KClNsb3QgcG93ZXIgbGltaXQgdmFsdWUgaXMgcmVhZCBmcm9tIGRldmljZS10 cmVlIHByb3BlcnR5CidzbG90LXBvd2VyLWxpbWl0LW1pbGxpd2F0dCcuIElmIHRoaXMgcHJvcGVy dHkgaXMgbm90IHNwZWNpZmllZCwgd2UKdHJlYXQgaXQgYXMgIlNsb3QgQ2FwYWJpbGl0aWVzIHJl Z2lzdGVyIGhhcyBub3QgeWV0IGJlZW4gaW5pdGlhbGl6ZWQiLgoKQWNjb3JkaW5nIHRvIFBDSWUg QmFzZSBzcGVjaWZpY2F0aW9uIDMuMCwgd2hlbiB0cmFuc2l0aW9uaW5nIGZyb20gYQpub24tRExf VXAgU3RhdHVzIHRvIGEgRExfVXAgU3RhdHVzLCB0aGUgUG9ydCBtdXN0IGluaXRpYXRlIHRoZQp0 cmFuc21pc3Npb24gb2YgYSBTZXRfU2xvdF9Qb3dlcl9MaW1pdCBNZXNzYWdlIHRvIHRoZSBvdGhl ciBjb21wb25lbnQKb24gdGhlIExpbmsgdG8gY29udmV5IHRoZSB2YWx1ZSBwcm9ncmFtbWVkIGlu IHRoZSBTbG90IFBvd2VyIExpbWl0ClNjYWxlIGFuZCBWYWx1ZSBmaWVsZHMgb2YgdGhlIFNsb3Qg Q2FwYWJpbGl0aWVzIHJlZ2lzdGVyLiBUaGlzCnRyYW5zbWlzc2lvbiBpcyBvcHRpb25hbCBpZiB0 aGUgU2xvdCBDYXBhYmlsaXRpZXMgcmVnaXN0ZXIgaGFzIG5vdAp5ZXQgYmVlbiBpbml0aWFsaXpl ZC4KClNpZ25lZC1vZmYtYnk6IFBhbGkgUm9ow6FyIDxwYWxpQGtlcm5lbC5vcmc+ClNpZ25lZC1v ZmYtYnk6IE1hcmVrIEJlaMO6biA8a2FiZWxAa2VybmVsLm9yZz4KLS0tCiBkcml2ZXJzL3BjaS9j b250cm9sbGVyL3BjaS1hYXJkdmFyay5jIHwgNTEgKysrKysrKysrKysrKysrKysrKysrKysrLS0t CiAxIGZpbGUgY2hhbmdlZCwgNDcgaW5zZXJ0aW9ucygrKSwgNCBkZWxldGlvbnMoLSkKCmRpZmYg LS1naXQgYS9kcml2ZXJzL3BjaS9jb250cm9sbGVyL3BjaS1hYXJkdmFyay5jIGIvZHJpdmVycy9w Y2kvY29udHJvbGxlci9wY2ktYWFyZHZhcmsuYwppbmRleCAzMWRhMjhlYmM1ZDEuLjAzZTMxOGJj MTcxZiAxMDA2NDQKLS0tIGEvZHJpdmVycy9wY2kvY29udHJvbGxlci9wY2ktYWFyZHZhcmsuYwor KysgYi9kcml2ZXJzL3BjaS9jb250cm9sbGVyL3BjaS1hYXJkdmFyay5jCkBAIC0yMTMsNiArMjEz LDExIEBAIGVudW0gewogfTsKIAogI2RlZmluZSBWRU5ET1JfSURfUkVHCQkJCShMTUlfQkFTRV9B RERSICsgMHg0NCkKKyNkZWZpbmUgUE1FX01TR19HRU5fQ1RSTAkJCShMTUlfQkFTRV9BRERSICsg MHgyMjApCisjZGVmaW5lICAgICBTRU5EX1NFVF9TTE9UX1BPV0VSX0xJTUlUCQlCSVQoMTMpCisj ZGVmaW5lICAgICBTRU5EX1BNRV9UVVJOX09GRgkJCUJJVCgxNCkKKyNkZWZpbmUgICAgIFNMT1Rf UE9XRVJfTElNSVRfREFUQV9TSElGVAkJMTYKKyNkZWZpbmUgICAgIFNMT1RfUE9XRVJfTElNSVRf REFUQV9NQVNLCQlHRU5NQVNLKDI1LCAxNikKIAogLyogUENJZSBjb3JlIGNvbnRyb2xsZXIgcmVn aXN0ZXJzICovCiAjZGVmaW5lIENUUkxfQ09SRV9CQVNFX0FERFIJCQkweDE4MDAwCkBAIC0yODUs NiArMjkwLDggQEAgc3RydWN0IGFkdmtfcGNpZSB7CiAJcmF3X3NwaW5sb2NrX3QgbXNpX2lycV9s b2NrOwogCURFQ0xBUkVfQklUTUFQKG1zaV91c2VkLCBNU0lfSVJRX05VTSk7CiAJc3RydWN0IG11 dGV4IG1zaV91c2VkX2xvY2s7CisJdTggc2xvdF9wb3dlcl9saW1pdF92YWx1ZTsKKwl1OCBzbG90 X3Bvd2VyX2xpbWl0X3NjYWxlOwogCWludCBsaW5rX2dlbjsKIAlib29sIGxpbmtfd2FzX3VwOwog CXN0cnVjdCB0aW1lcl9saXN0IGxpbmtfaXJxX3RpbWVyOwpAQCAtMzE3LDggKzMyNCw5IEBAIHN0 YXRpYyBpbmxpbmUgYm9vbCBhZHZrX3BjaWVfbGlua191cChzdHJ1Y3QgYWR2a19wY2llICpwY2ll KQogewogCS8qIGNoZWNrIGlmIExUU1NNIGlzIGluIG5vcm1hbCBvcGVyYXRpb24gLSBzb21lIEwq IHN0YXRlICovCiAJdTggbHRzc21fc3RhdGUgPSBhZHZrX3BjaWVfbHRzc21fc3RhdGUocGNpZSk7 CisJdTE2IHNsb3RzdGEsIHNsb3RjdGw7CisJdTMyIHNsb3Rwd3IsIHZhbDsKIAlib29sIGxpbmtf aXNfdXA7Ci0JdTE2IHNsb3RzdGE7CiAKIAlsaW5rX2lzX3VwID0gbHRzc21fc3RhdGUgPj0gTFRT U01fTDAgJiYgbHRzc21fc3RhdGUgPCBMVFNTTV9ESVNBQkxFRDsKIApAQCAtMzMyLDYgKzM0MCwy NyBAQCBzdGF0aWMgaW5saW5lIGJvb2wgYWR2a19wY2llX2xpbmtfdXAoc3RydWN0IGFkdmtfcGNp ZSAqcGNpZSkKIAkJcGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90c3RhID0gY3B1X3RvX2xlMTYo c2xvdHN0YSk7CiAKIAkJbW9kX3RpbWVyKCZwY2llLT5saW5rX2lycV90aW1lciwgamlmZmllcyAr IDEpOworCisJCS8qCisJCSAqIEFjY29yZGluZyB0byBQQ0llIEJhc2Ugc3BlY2lmaWNhdGlvbiAz LjAsIHdoZW4gdHJhbnNpdGlvbmluZworCQkgKiBmcm9tIGEgbm9uLURMX1VwIFN0YXR1cyB0byBh IERMX1VwIFN0YXR1cywgdGhlIFBvcnQgbXVzdAorCQkgKiBpbml0aWF0ZSB0aGUgdHJhbnNtaXNz aW9uIG9mIGEgU2V0X1Nsb3RfUG93ZXJfTGltaXQgTWVzc2FnZQorCQkgKiB0byB0aGUgb3RoZXIg Y29tcG9uZW50IG9uIHRoZSBMaW5rIHRvIGNvbnZleSB0aGUgdmFsdWUKKwkJICogcHJvZ3JhbW1l ZCBpbiB0aGUgU2xvdCBQb3dlciBMaW1pdCBTY2FsZSBhbmQgVmFsdWUgZmllbGRzIG9mCisJCSAq IHRoZSBTbG90IENhcGFiaWxpdGllcyByZWdpc3Rlci4gVGhpcyB0cmFuc21pc3Npb24gaXMgb3B0 aW9uYWwKKwkJICogaWYgdGhlIFNsb3QgQ2FwYWJpbGl0aWVzIHJlZ2lzdGVyIGhhcyBub3QgeWV0 IGJlZW4KKwkJICogaW5pdGlhbGl6ZWQuCisJCSAqLworCQlzbG90Y3RsID0gbGUxNl90b19jcHUo cGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90Y3RsKTsKKwkJc2xvdHB3ciA9IEZJRUxEX0dFVChQ Q0lfRVhQX1NMVENBUF9TUExWIHwgUENJX0VYUF9TTFRDQVBfU1BMUywKKwkJCQkgICAgbGUzMl90 b19jcHUocGNpZS0+YnJpZGdlLnBjaWVfY29uZi5zbG90Y2FwKSk7CisJCWlmICghKHNsb3RjdGwg JiBQQ0lfRVhQX1NMVENUTF9BU1BMX0RJU0FCTEUpICYmIHNsb3Rwd3IpIHsKKwkJCXZhbCA9IGFk dmtfcmVhZGwocGNpZSwgUE1FX01TR19HRU5fQ1RSTCk7CisJCQl2YWwgJj0gflNMT1RfUE9XRVJf TElNSVRfREFUQV9NQVNLOworCQkJdmFsIHw9IHNsb3Rwd3IgPDwgU0xPVF9QT1dFUl9MSU1JVF9E QVRBX1NISUZUOworCQkJdmFsIHw9IFNFTkRfU0VUX1NMT1RfUE9XRVJfTElNSVQ7CisJCQlhZHZr X3dyaXRlbChwY2llLCB2YWwsIFBNRV9NU0dfR0VOX0NUUkwpOworCQl9CiAJfQogCiAJcmV0dXJu IGxpbmtfaXNfdXA7CkBAIC05NDQsOCArOTczLDkgQEAgYWR2a19wY2lfYnJpZGdlX2VtdWxfcGNp ZV9jb25mX3dyaXRlKHN0cnVjdCBwY2lfYnJpZGdlX2VtdWwgKmJyaWRnZSwKIAogCWNhc2UgUENJ X0VYUF9TTFRDVEw6IHsKIAkJdTE2IHNsb3RjdGwgPSBsZTE2X3RvX2NwdShicmlkZ2UtPnBjaWVf Y29uZi5zbG90Y3RsKTsKLQkJLyogT25seSBlbXVsYXRpb24gb2YgSFBJRSBhbmQgRExMU0NFIGJp dHMgaXMgcHJvdmlkZWQgKi8KLQkJc2xvdGN0bCAmPSBQQ0lfRVhQX1NMVENUTF9IUElFIHwgUENJ X0VYUF9TTFRDVExfRExMU0NFOworCQkvKiBPbmx5IGVtdWxhdGlvbiBvZiBIUElFLCBETExTQ0Ug YW5kIEFTUExEIGJpdHMgaXMgcHJvdmlkZWQgKi8KKwkJc2xvdGN0bCAmPSBQQ0lfRVhQX1NMVENU TF9IUElFIHwgUENJX0VYUF9TTFRDVExfRExMU0NFIHwKKwkJCSAgIFBDSV9FWFBfU0xUQ1RMX0FT UExfRElTQUJMRTsKIAkJYnJpZGdlLT5wY2llX2NvbmYuc2xvdGN0bCA9IGNwdV90b19sZTE2KHNs b3RjdGwpOwogCQlicmVhazsKIAl9CkBAIC0xMTA5LDkgKzExMzksMTMgQEAgc3RhdGljIGludCBh ZHZrX3N3X3BjaV9icmlkZ2VfaW5pdChzdHJ1Y3QgYWR2a19wY2llICpwY2llKQogCSAqIFNldCBw aHlzaWNhbCBzbG90IG51bWJlciB0byAxIHNpbmNlIHRoZXJlIGlzIG9ubHkgb25lIHBvcnQgYW5k IHplcm8KIAkgKiB2YWx1ZSBpcyByZXNlcnZlZCBmb3IgcG9ydHMgd2l0aGluIHRoZSBzYW1lIHNp bGljb24gYXMgUm9vdCBQb3J0CiAJICogd2hpY2ggaXMgbm90IG91ciBjYXNlLgorCSAqCisJICog U2V0IHNsb3QgcG93ZXIgbGltaXQuCiAJICovCiAJc2xvdGNhcCA9IFBDSV9FWFBfU0xUQ0FQX05D Q1MgfCBQQ0lfRVhQX1NMVENBUF9IUEMgfAotCQkgIEZJRUxEX1BSRVAoUENJX0VYUF9TTFRDQVBf UFNOLCAxKTsKKwkJICBGSUVMRF9QUkVQKFBDSV9FWFBfU0xUQ0FQX1BTTiwgMSkgfAorCQkgIEZJ RUxEX1BSRVAoUENJX0VYUF9TTFRDQVBfU1BMViwgcGNpZS0+c2xvdF9wb3dlcl9saW1pdF92YWx1 ZSkgfAorCQkgIEZJRUxEX1BSRVAoUENJX0VYUF9TTFRDQVBfU1BMUywgcGNpZS0+c2xvdF9wb3dl cl9saW1pdF9zY2FsZSk7CiAJYnJpZGdlLT5wY2llX2NvbmYuc2xvdGNhcCA9IGNwdV90b19sZTMy KHNsb3RjYXApOwogCWJyaWRnZS0+cGNpZV9jb25mLnNsb3RzdGEgPSBjcHVfdG9fbGUxNihQQ0lf RVhQX1NMVFNUQV9QRFMpOwogCkBAIC0xODM3LDYgKzE4NzEsNyBAQCBzdGF0aWMgaW50IGFkdmtf cGNpZV9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCXN0cnVjdCBhZHZrX3Bj aWUgKnBjaWU7CiAJc3RydWN0IHBjaV9ob3N0X2JyaWRnZSAqYnJpZGdlOwogCXN0cnVjdCByZXNv dXJjZV9lbnRyeSAqZW50cnk7CisJdTMyIHNsb3RfcG93ZXJfbGltaXQ7CiAJaW50IHJldCwgaXJx OwogCiAJYnJpZGdlID0gZGV2bV9wY2lfYWxsb2NfaG9zdF9icmlkZ2UoZGV2LCBzaXplb2Yoc3Ry dWN0IGFkdmtfcGNpZSkpOwpAQCAtMTk1Nyw2ICsxOTkyLDE0IEBAIHN0YXRpYyBpbnQgYWR2a19w Y2llX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJZWxzZQogCQlwY2llLT5s aW5rX2dlbiA9IHJldDsKIAorCXNsb3RfcG93ZXJfbGltaXQgPSBvZl9wY2lfZ2V0X3Nsb3RfcG93 ZXJfbGltaXQoZGV2LT5vZl9ub2RlLAorCQkJCQkJICAgICAgICZwY2llLT5zbG90X3Bvd2VyX2xp bWl0X3ZhbHVlLAorCQkJCQkJICAgICAgICZwY2llLT5zbG90X3Bvd2VyX2xpbWl0X3NjYWxlKTsK KwlpZiAoc2xvdF9wb3dlcl9saW1pdCkKKwkJZGV2X2luZm8oZGV2LCAiU2xvdCBQb3dlciBMaW1p dDogJXUuJXVXXG4iLAorCQkJIHNsb3RfcG93ZXJfbGltaXQgLyAxMDAwLAorCQkJIChzbG90X3Bv d2VyX2xpbWl0IC8gMTAwKSAlIDEwKTsKKwogCXJldCA9IGFkdmtfcGNpZV9zZXR1cF9waHkocGNp ZSk7CiAJaWYgKHJldCkKIAkJcmV0dXJuIHJldDsKLS0gCjIuMzUuMQoKCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGlu ZyBsaXN0CmxpbnV4LWFybS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMu aW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK