From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 11CBCC433F5 for ; Tue, 4 Oct 2022 08:40:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229795AbiJDIkH (ORCPT ); Tue, 4 Oct 2022 04:40:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229673AbiJDIkG (ORCPT ); Tue, 4 Oct 2022 04:40:06 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C2331116F; Tue, 4 Oct 2022 01:40:03 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 0CCBCB80D6C; Tue, 4 Oct 2022 08:40:02 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2C48FC433D6; Tue, 4 Oct 2022 08:40:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1664872800; bh=bx68xPJAJ43lau5j5ugu8iFK/HU4dpaBmftcd9vEsVI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=oiu4jNea5fa5S1YvKCDns/73BLlseerk4sCZr07W1pdgXdigPXLVg57A6AbgJkXRm VdjObfBHa5DicDcu6o87340sf5X/qEpteCTvBj4QeeUU9BcoETJAXv/60KhUOPp3Y0 TTNpP4hyLzwM2z07hR1iKtzgkJosBarHSAXPTfYMzizOtle9jLtusHe3bQL2JC6HRG 8k1Df5y+oOXbQLY6E5sr2im/3JAEUaorU5GQ74fE5z43nrENWQ4cM5JP6kmJsFxDX9 v/JO9WHcf2GJ//cjQhxF0hSts2smBCYnC+ONFemRveYuJGQY/RtotnU/MKana9TgD1 UIxi26EC7y2Fg== Received: by pali.im (Postfix) id 2058F7BA; Tue, 4 Oct 2022 10:39:57 +0200 (CEST) Date: Tue, 4 Oct 2022 10:39:57 +0200 From: Pali =?utf-8?B?Um9ow6Fy?= To: Elad Nachman , Lorenzo Pieralisi Cc: Bjorn Helgaas , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [EXT] Re: [PATCH v2] PCI: aardvark: Implement workaround for PCIe Completion Timeout Message-ID: <20221004083957.qtfkn4eyi42lsd4j@pali> References: <20220802123816.21817-1-pali@kernel.org> <20220926123434.2tqx4t6u3cnlrcx3@pali> <20221003211412.5pqfjvcxyszd4ai6@pali> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: User-Agent: NeoMutt/20180716 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org + Elad Could you please look at Lorenzo's comments and help with this fix? On Tuesday 04 October 2022 10:02:32 Lorenzo Pieralisi wrote: > On Mon, Oct 03, 2022 at 11:14:12PM +0200, Pali Rohár wrote: > > Lorenzo, is something more needed for this patch? As it workarounds > > crashing it is really needed to have it in mainline and backports. > > Yes, a clear explanation from Marvell about what this is actually > fixing - it took me a while to go through the whole thread but > I still don't understand what this patch actually does and why. > > An Erratum workaround (if there is any) should define and explain > a SW workaround. > > (1) Bjorn's concerns in relation to PCI memory model weren't addressed > (2) We don't add undocumented memory barriers to the kernel to "minimize > risks". Either we fix a bug or we don't. If we do, write that down > and document why the barrier is there and the issue it solves. > > I understand that basically you are reverse engineering a HW bug but > I am afraid we can't fix the kernel this way - more so with patches > going to be backported to stable kernels. > > Lorenzo > > > On Wednesday 28 September 2022 14:05:10 Elad Nachman wrote: > > > Reviewed-by: Elad Nachman > > > > > > Thanks, > > > > > > Elad. > > > > > > -----Original Message----- > > > From: Pali Rohár > > > Sent: Monday, September 26, 2022 3:35 PM > > > To: Elad Nachman > > > Cc: Thomas Petazzoni ; Lorenzo Pieralisi ; Bjorn Helgaas ; Krzysztof Wilczyński ; Rob Herring ; linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Gregory Clement ; Marek Behún ; Remi Pommarel ; Xogium ; Tomasz Maciej Nowak > > > Subject: [EXT] Re: [PATCH v2] PCI: aardvark: Implement workaround for PCIe Completion Timeout > > > > > > External Email > > > > > > ---------------------------------------------------------------------- > > > Hello Elad, could you please review this patch? I have implemented it according your instructions, including that full memory barrier as you described. > > > > > > On Tuesday 02 August 2022 14:38:16 Pali Rohár wrote: > > > > Marvell Armada 3700 Functional Errata, Guidelines, and Restrictions > > > > document describes in erratum 3.12 PCIe Completion Timeout (Ref #: > > > > 251), that PCIe IP does not support a strong-ordered model for inbound posted vs. > > > > outbound completion. > > > > > > > > As a workaround for this erratum, DIS_ORD_CHK flag in Debug Mux > > > > Control register must be set. It disables the ordering check in the > > > > core between Completions and Posted requests received from the link. > > > > > > > > Marvell also suggests to do full memory barrier at the beginning of > > > > aardvark summary interrupt handler before calling interrupt handlers > > > > of endpoint drivers in order to minimize the risk for the race > > > > condition documented in the Erratum between the DMA done status > > > > reading and the completion of writing to the host memory. > > > > > > > > More details about this issue and suggested workarounds are in discussion: > > > > https://urldefense.proofpoint.com/v2/url?u=https-3A__lore.kernel.org_l > > > > inux-2Dpci_BN9PR18MB425154FE5019DCAF2028A1D5DB8D9-40BN9PR18MB4251.namp > > > > rd18.prod.outlook.com_t_-23u&d=DwIDaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=eTeNT > > > > LEK5-TxXczjOcKPhANIFtlB9pP4lq9qhdlFrwQ&m=bjgkhgPgOjqCEsbHYHONCZMiFDX72 > > > > MztWaE0AvWBktQVn3zKEDtUdn02Kx_KJ14B&s=SToGsDGEObwbZGilVtVZPyME8jNiRgrq > > > > 4SDYvqqT0TA&e= > > > > > > > > It was reported that enabling this workaround fixes instability issues > > > > and "Unhandled fault" errors when using 60 GHz WiFi 802.11ad card with > > > > Qualcomm > > > > QCA6335 chip under significant load which were caused by interrupt > > > > status stuck in the outbound CMPLT queue traced back to this erratum. > > > > > > > > This workaround fixes also kernel panic triggered after some minutes > > > > of usage 5 GHz WiFi 802.11ax card with Mediatek MT7915 chip: > > > > > > > > Internal error: synchronous external abort: 96000210 [#1] SMP > > > > Kernel panic - not syncing: Fatal exception in interrupt > > > > > > > > Signed-off-by: Thomas Petazzoni > > > > Signed-off-by: Pali Rohár > > > > Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller > > > > driver") > > > > Cc: stable@vger.kernel.org > > > > --- > > > > drivers/pci/controller/pci-aardvark.c | 10 ++++++++++ > > > > 1 file changed, 10 insertions(+) > > > > > > > > diff --git a/drivers/pci/controller/pci-aardvark.c > > > > b/drivers/pci/controller/pci-aardvark.c > > > > index 060936ef01fe..3ae8a85ec72e 100644 > > > > --- a/drivers/pci/controller/pci-aardvark.c > > > > +++ b/drivers/pci/controller/pci-aardvark.c > > > > @@ -210,6 +210,8 @@ enum { > > > > }; > > > > > > > > #define VENDOR_ID_REG (LMI_BASE_ADDR + 0x44) > > > > +#define DEBUG_MUX_CTRL_REG (LMI_BASE_ADDR + 0x208) > > > > +#define DIS_ORD_CHK BIT(30) > > > > > > > > /* PCIe core controller registers */ > > > > #define CTRL_CORE_BASE_ADDR 0x18000 > > > > @@ -558,6 +560,11 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) > > > > PCIE_CORE_CTRL2_TD_ENABLE; > > > > advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); > > > > > > > > + /* Disable ordering checks, workaround for erratum 3.12 "PCIe completion timeout" */ > > > > + reg = advk_readl(pcie, DEBUG_MUX_CTRL_REG); > > > > + reg |= DIS_ORD_CHK; > > > > + advk_writel(pcie, reg, DEBUG_MUX_CTRL_REG); > > > > + > > > > /* Set lane X1 */ > > > > reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG); > > > > reg &= ~LANE_CNT_MSK; > > > > @@ -1581,6 +1588,9 @@ static irqreturn_t advk_pcie_irq_handler(int irq, void *arg) > > > > struct advk_pcie *pcie = arg; > > > > u32 status; > > > > > > > > + /* Full memory barrier (ARM dsb sy), workaround for erratum 3.12 "PCIe completion timeout" */ > > > > + mb(); > > > > + > > > > status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); > > > > if (!(status & PCIE_IRQ_CORE_INT)) > > > > return IRQ_NONE; > > > > -- > > > > 2.20.1 > > > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher 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