All of lore.kernel.org
 help / color / mirror / Atom feed
From: Anup Patel <apatel@ventanamicro.com>
To: kvm-riscv@lists.infradead.org
Subject: [PATCH kvmtool 6/6] riscv: Add --disable-<xyz> options to allow user disable extensions
Date: Tue, 18 Oct 2022 19:38:54 +0530	[thread overview]
Message-ID: <20221018140854.69846-7-apatel@ventanamicro.com> (raw)
In-Reply-To: <20221018140854.69846-1-apatel@ventanamicro.com>

By default, the KVM RISC-V keeps all extensions available to VCPU
enabled and KVMTOOL does not disable any extension.

We add --disable-<xyz> command-line options in KVMTOOL RISC-V to
allow users explicitly disable certain extension if they don't
desire it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 riscv/fdt.c                         |  8 ++++++++
 riscv/include/kvm/kvm-config-arch.h | 18 +++++++++++++++++-
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index 30d3460..3cdb95c 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -80,6 +80,14 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 				/* This extension is not available in hardware */
 				continue;
 
+			if (kvm->cfg.arch.ext_disabled[isa_info_arr[i].ext_id]) {
+				isa_ext_out = 0;
+				if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
+					pr_warning("Failed to disable %s ISA exension\n",
+						   isa_info_arr[i].name);
+				continue;
+			}
+
 			if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOM && !cbom_blksz) {
 				reg.id = RISCV_CONFIG_REG(zicbom_block_size);
 				reg.addr = (unsigned long)&cbom_blksz;
diff --git a/riscv/include/kvm/kvm-config-arch.h b/riscv/include/kvm/kvm-config-arch.h
index 526fca2..188125c 100644
--- a/riscv/include/kvm/kvm-config-arch.h
+++ b/riscv/include/kvm/kvm-config-arch.h
@@ -5,11 +5,27 @@
 
 struct kvm_config_arch {
 	const char	*dump_dtb_filename;
+	bool		ext_disabled[KVM_RISCV_ISA_EXT_MAX];
 };
 
 #define OPT_ARCH_RUN(pfx, cfg)						\
 	pfx,								\
 	OPT_STRING('\0', "dump-dtb", &(cfg)->dump_dtb_filename,		\
-		   ".dtb file", "Dump generated .dtb to specified file"),
+		   ".dtb file", "Dump generated .dtb to specified file"),\
+	OPT_BOOLEAN('\0', "disable-sstc",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SSTC],	\
+		    "Disable Sstc Extension"),				\
+	OPT_BOOLEAN('\0', "disable-svinval",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SVINVAL],	\
+		    "Disable Svinval Extension"),			\
+	OPT_BOOLEAN('\0', "disable-svpbmt",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SVPBMT],	\
+		    "Disable Svpbmt Extension"),			\
+	OPT_BOOLEAN('\0', "disable-zicbom",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOM],	\
+		    "Disable Zicbom Extension"),			\
+	OPT_BOOLEAN('\0', "disable-zihintpause",			\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZIHINTPAUSE],\
+		    "Disable Zihintpause Extension"),
 
 #endif /* KVM__KVM_CONFIG_ARCH_H */
-- 
2.34.1



WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Will Deacon <will@kernel.org>,
	julien.thierry.kdev@gmail.com, maz@kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Atish Patra <atishp@atishpatra.org>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Anup Patel <anup@brainfault.org>,
	kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
	Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH kvmtool 6/6] riscv: Add --disable-<xyz> options to allow user disable extensions
Date: Tue, 18 Oct 2022 19:38:54 +0530	[thread overview]
Message-ID: <20221018140854.69846-7-apatel@ventanamicro.com> (raw)
In-Reply-To: <20221018140854.69846-1-apatel@ventanamicro.com>

By default, the KVM RISC-V keeps all extensions available to VCPU
enabled and KVMTOOL does not disable any extension.

We add --disable-<xyz> command-line options in KVMTOOL RISC-V to
allow users explicitly disable certain extension if they don't
desire it.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 riscv/fdt.c                         |  8 ++++++++
 riscv/include/kvm/kvm-config-arch.h | 18 +++++++++++++++++-
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/riscv/fdt.c b/riscv/fdt.c
index 30d3460..3cdb95c 100644
--- a/riscv/fdt.c
+++ b/riscv/fdt.c
@@ -80,6 +80,14 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm)
 				/* This extension is not available in hardware */
 				continue;
 
+			if (kvm->cfg.arch.ext_disabled[isa_info_arr[i].ext_id]) {
+				isa_ext_out = 0;
+				if (ioctl(vcpu->vcpu_fd, KVM_SET_ONE_REG, &reg) < 0)
+					pr_warning("Failed to disable %s ISA exension\n",
+						   isa_info_arr[i].name);
+				continue;
+			}
+
 			if (isa_info_arr[i].ext_id == KVM_RISCV_ISA_EXT_ZICBOM && !cbom_blksz) {
 				reg.id = RISCV_CONFIG_REG(zicbom_block_size);
 				reg.addr = (unsigned long)&cbom_blksz;
diff --git a/riscv/include/kvm/kvm-config-arch.h b/riscv/include/kvm/kvm-config-arch.h
index 526fca2..188125c 100644
--- a/riscv/include/kvm/kvm-config-arch.h
+++ b/riscv/include/kvm/kvm-config-arch.h
@@ -5,11 +5,27 @@
 
 struct kvm_config_arch {
 	const char	*dump_dtb_filename;
+	bool		ext_disabled[KVM_RISCV_ISA_EXT_MAX];
 };
 
 #define OPT_ARCH_RUN(pfx, cfg)						\
 	pfx,								\
 	OPT_STRING('\0', "dump-dtb", &(cfg)->dump_dtb_filename,		\
-		   ".dtb file", "Dump generated .dtb to specified file"),
+		   ".dtb file", "Dump generated .dtb to specified file"),\
+	OPT_BOOLEAN('\0', "disable-sstc",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SSTC],	\
+		    "Disable Sstc Extension"),				\
+	OPT_BOOLEAN('\0', "disable-svinval",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SVINVAL],	\
+		    "Disable Svinval Extension"),			\
+	OPT_BOOLEAN('\0', "disable-svpbmt",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_SVPBMT],	\
+		    "Disable Svpbmt Extension"),			\
+	OPT_BOOLEAN('\0', "disable-zicbom",				\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZICBOM],	\
+		    "Disable Zicbom Extension"),			\
+	OPT_BOOLEAN('\0', "disable-zihintpause",			\
+		    &(cfg)->ext_disabled[KVM_RISCV_ISA_EXT_ZIHINTPAUSE],\
+		    "Disable Zihintpause Extension"),
 
 #endif /* KVM__KVM_CONFIG_ARCH_H */
-- 
2.34.1


  parent reply	other threads:[~2022-10-18 14:08 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-18 14:08 [PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support Anup Patel
2022-10-18 14:08 ` Anup Patel
2022-10-18 14:08 ` [PATCH kvmtool 1/6] Update UAPI headers based on Linux-6.1-rc1 Anup Patel
2022-10-18 14:08   ` Anup Patel
2022-10-18 14:08 ` [PATCH kvmtool 2/6] riscv: Add Svinval extension support Anup Patel
2022-10-18 14:08   ` Anup Patel
2022-10-18 14:08 ` [PATCH kvmtool 3/6] riscv: Add zihintpause " Anup Patel
2022-10-18 14:08   ` Anup Patel
2022-10-18 14:08 ` [PATCH kvmtool 4/6] riscv: Move reg encoding helpers to kvm-cpu-arch.h Anup Patel
2022-10-18 14:08   ` Anup Patel
2022-10-18 14:08 ` [PATCH kvmtool 5/6] riscv: Add Zicbom extension support Anup Patel
2022-10-18 14:08   ` Anup Patel
2022-10-18 14:08 ` Anup Patel [this message]
2022-10-18 14:08   ` [PATCH kvmtool 6/6] riscv: Add --disable-<xyz> options to allow user disable extensions Anup Patel
2022-11-07 12:20 ` [PATCH kvmtool 0/6] RISC-V Svinval, Zihintpause, anad Zicbom support Anup Patel
2022-11-07 12:20   ` Anup Patel
2022-11-08 15:33   ` Will Deacon
2022-11-08 15:33     ` Will Deacon
2022-11-08 17:38 ` Will Deacon
2022-11-08 17:38   ` Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20221018140854.69846-7-apatel@ventanamicro.com \
    --to=apatel@ventanamicro.com \
    --cc=kvm-riscv@lists.infradead.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.