From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 16/16] drm/i915/perf: Enable OA for DG2
Date: Tue, 25 Oct 2022 20:17:08 +0000 [thread overview]
Message-ID: <20221025201708.84018-17-umesh.nerlige.ramappa@intel.com> (raw)
In-Reply-To: <20221025201708.84018-1-umesh.nerlige.ramappa@intel.com>
OA was disabled for DG2 as support was missing. Enable it back now.
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
---
drivers/gpu/drm/i915/i915_perf.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 176442d5e57e..3438cff13f38 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -4798,12 +4798,6 @@ void i915_perf_init(struct drm_i915_private *i915)
{
struct i915_perf *perf = &i915->perf;
- /* XXX const struct i915_perf_ops! */
-
- /* i915_perf is not enabled for DG2 yet */
- if (IS_DG2(i915))
- return;
-
perf->oa_formats = oa_formats;
if (IS_HASWELL(i915)) {
perf->ops.is_valid_b_counter_reg = gen7_is_valid_b_counter_addr;
--
2.25.1
next prev parent reply other threads:[~2022-10-25 20:18 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-25 20:16 [Intel-gfx] [PATCH v5 00/16] Add DG2 OA support Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 01/16] drm/i915/perf: Fix OA filtering logic for GuC mode Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 02/16] drm/i915/perf: Add 32-bit OAG and OAR formats for DG2 Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 03/16] drm/i915/perf: Fix noa wait predication " Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 04/16] drm/i915/perf: Determine gen12 oa ctx offset at runtime Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 05/16] drm/i915/perf: Enable bytes per clock reporting in OA Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 06/16] drm/i915/perf: Simply use stream->ctx Umesh Nerlige Ramappa
2022-10-25 20:16 ` [Intel-gfx] [PATCH v5 07/16] drm/i915/perf: Move gt-specific data from i915->perf to gt->perf Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 08/16] drm/i915/perf: Replace gt->perf.lock with stream->lock for file ops Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 09/16] drm/i915/perf: Use gt-specific ggtt for OA and noa-wait buffers Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 10/16] drm/i915/perf: Store a pointer to oa_format in oa_buffer Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 11/16] drm/i915/perf: Add Wa_1508761755:dg2 Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 12/16] drm/i915/perf: Apply Wa_18013179988 Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 13/16] drm/i915/perf: Save/restore EU flex counters across reset Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 14/16] drm/i915/guc: Support OA when Wa_16011777198 is enabled Umesh Nerlige Ramappa
2022-10-25 20:17 ` [Intel-gfx] [PATCH v5 15/16] drm/i915/perf: complete programming whitelisting for XEHPSDV Umesh Nerlige Ramappa
2022-10-25 20:17 ` Umesh Nerlige Ramappa [this message]
2022-10-25 21:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DG2 OA support (rev10) Patchwork
2022-10-25 21:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-26 14:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-26 19:03 ` Umesh Nerlige Ramappa
-- strict thread matches above, loose matches on Subject: below --
2022-10-18 22:36 [Intel-gfx] [PATCH v5 00/16] Add DG2 OA support Umesh Nerlige Ramappa
2022-10-18 22:36 ` [Intel-gfx] [PATCH v5 16/16] drm/i915/perf: Enable OA for DG2 Umesh Nerlige Ramappa
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