From: Bjorn Helgaas <helgaas@kernel.org>
To: LeoLiu-oc <LeoLiu-oc@zhaoxin.com>
Cc: rafael@kernel.org, lenb@kernel.org, james.morse@arm.com,
tony.luck@intel.com, bp@alien8.de, robert.moore@intel.com,
ying.huang@intel.com, rdunlap@infradead.org, bhelgaas@google.com,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, devel@acpica.org,
CobeChen@zhaoxin.com, TonyWWang@zhaoxin.com,
ErosZhang@zhaoxin.com
Subject: Re: [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers
Date: Thu, 27 Oct 2022 17:09:31 -0500 [thread overview]
Message-ID: <20221027220931.GA843829@bhelgaas> (raw)
In-Reply-To: <20221027031458.2855599-1-LeoLiu-oc@zhaoxin.com>
On Thu, Oct 27, 2022 at 11:14:58AM +0800, LeoLiu-oc wrote:
> From: leoliu-oc <leoliu-oc@zhaoxin.com>
>
> HEST PCIE AER error source information describes the Uncorrectable Error
> Severity, CorrectableError Mask and other aer register's value to write to the
> bridge's Correctable Error Mask register.
I guess the point is to extract register values from HEST PCI Express
AER structures (ACPI r6.5, sec 18.3.2.4, etc.) and program them into
AER Capabilities?
> leoliu-oc (5):
> ACPI/APEI: Add apei_hest_parse_aer()
> ACPI/APEI: remove static from apei_hest_parse()
> ACPI/PCI: Add AER bits #defines for PCIE/PCI-X bridges
> ACPI/PCI: Add pci_acpi_program_hest_aer_params()
> ACPI/PCI: config pcie devices's aer register
If/when you repost this, it would be nice if the patches ([1/5],
[2/5], etc) were responses to the cover letter ([0/5]). Since they're
not responses, b4 doesn't know they're connected and can't grab the
whole series at once.
Also capitalize the subject lines consistently and s/PCIE/PCIe/ and
s/pcie/PCIe/ and s/aer/AER/, e.g.,
ACPI/APEI: Add apei_hest_parse_aer()
ACPI/APEI: Remove static from apei_hest_parse()
PCI: Add AER #defines for PCIe/PCI-X bridges
ACPI/PCI: Add pci_acpi_program_hest_aer_params()
ACPI/PCI: Configure devices AER registers based on HEST
> drivers/acpi/apei/hest.c | 121 +++++++++++++++++++++++++++++++++-
> drivers/pci/pci-acpi.c | 92 ++++++++++++++++++++++++++
> drivers/pci/pci.h | 5 ++
> drivers/pci/probe.c | 1 +
> include/acpi/actbl1.h | 69 +++++++++++++++++++
> include/acpi/apei.h | 9 +++
> include/uapi/linux/pci_regs.h | 5 ++
> 7 files changed, 300 insertions(+), 2 deletions(-)
>
> --
> 2.20.1
>
next prev parent reply other threads:[~2022-10-27 22:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-27 3:14 [PATCH 0/5] Parse the PCIE AER structure and set to relevant registers LeoLiu-oc
2022-10-27 4:17 ` Sathyanarayanan Kuppuswamy
2022-10-28 11:19 ` LeoLiuoc
2022-10-28 15:15 ` Bjorn Helgaas
2022-11-01 7:25 ` LeoLiuoc
2022-10-27 22:09 ` Bjorn Helgaas [this message]
2022-10-28 11:23 ` LeoLiuoc
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