From: "Richard W.M. Jones" <rjones@redhat.com>
To: "Daniel P. Berrangé" <berrange@redhat.com>
Cc: qemu-devel@nongnu.org, Laurent Vivier <lvivier@redhat.com>,
Richard Henderson <richard.henderson@linaro.org>,
Ani Sinha <ani@anisinha.ca>, Igor Mammedov <imammedo@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
Thomas Huth <thuth@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Eduardo Habkost <eduardo@habkost.net>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: Re: [PATCH 2/4] hw/isa: add trace events for ICH9 LPC chip config access
Date: Mon, 31 Oct 2022 13:36:05 +0000 [thread overview]
Message-ID: <20221031133605.GH7636@redhat.com> (raw)
In-Reply-To: <20221031131934.425448-3-berrange@redhat.com>
On Mon, Oct 31, 2022 at 01:19:32PM +0000, Daniel P. Berrangé wrote:
> These tracepoints aid in understanding and debugging the guest drivers
> for the TCO watchdog.
>
> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
> ---
> hw/isa/lpc_ich9.c | 3 +++
> hw/isa/trace-events | 4 ++++
> 2 files changed, 7 insertions(+)
>
> diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
> index 4553b5925b..66062a344c 100644
> --- a/hw/isa/lpc_ich9.c
> +++ b/hw/isa/lpc_ich9.c
> @@ -51,6 +51,7 @@
> #include "hw/nvram/fw_cfg.h"
> #include "qemu/cutils.h"
> #include "hw/acpi/acpi_aml_interface.h"
> +#include "trace.h"
>
> /*****************************************************************************/
> /* ICH9 LPC PCI to ISA bridge */
> @@ -161,6 +162,7 @@ static void ich9_cc_write(void *opaque, hwaddr addr,
> {
> ICH9LPCState *lpc = (ICH9LPCState *)opaque;
>
> + trace_ich9_cc_write(addr, val, len);
> ich9_cc_addr_len(&addr, &len);
> memcpy(lpc->chip_config + addr, &val, len);
> pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d));
> @@ -176,6 +178,7 @@ static uint64_t ich9_cc_read(void *opaque, hwaddr addr,
> uint32_t val = 0;
> ich9_cc_addr_len(&addr, &len);
> memcpy(&val, lpc->chip_config + addr, len);
> + trace_ich9_cc_read(addr, val, len);
> return val;
> }
>
> diff --git a/hw/isa/trace-events b/hw/isa/trace-events
> index b8f877e1ed..c4567a9b47 100644
> --- a/hw/isa/trace-events
> +++ b/hw/isa/trace-events
> @@ -21,3 +21,7 @@ via_pm_io_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%
> via_pm_io_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x"
> via_superio_read(uint8_t addr, uint8_t val) "addr 0x%x val 0x%x"
> via_superio_write(uint8_t addr, uint32_t val) "addr 0x%x val 0x%x"
> +
> +# lpc_ich9.c
> +ich9_cc_write(uint64_t addr, uint64_t val, unsigned len) "addr=0x%"PRIx64 " val=0x%"PRIx64 " len=%u"
> +ich9_cc_read(uint64_t addr, uint64_t val, unsigned len) "addr=0x%"PRIx64 " val=0x%"PRIx64 " len=%u"
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
I can't help thinking that the trace-events file ought to be generated
from the source code ...
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualization blog: http://rwmj.wordpress.com
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next prev parent reply other threads:[~2022-10-31 13:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 13:19 [PATCH 0/4] hw: make TCO watchdog actually work by default for Q35 Daniel P. Berrangé
2022-10-31 13:19 ` [PATCH 1/4] hw/acpi: add trace events for TCO watchdog register access Daniel P. Berrangé
2022-10-31 13:34 ` Richard W.M. Jones
2022-10-31 13:19 ` [PATCH 2/4] hw/isa: add trace events for ICH9 LPC chip config access Daniel P. Berrangé
2022-10-31 13:36 ` Richard W.M. Jones [this message]
2022-10-31 13:19 ` [PATCH 3/4] hw/watchdog: add trace events for watchdog action handling Daniel P. Berrangé
2022-10-31 13:36 ` Richard W.M. Jones
2022-10-31 15:46 ` Philippe Mathieu-Daudé
2022-10-31 13:19 ` [PATCH 4/4] hw/isa: enable TCO watchdog reboot pin strap by default Daniel P. Berrangé
2022-10-31 13:40 ` Richard W.M. Jones
2022-10-31 13:50 ` [PATCH 0/4] hw: make TCO watchdog actually work by default for Q35 Daniel P. Berrangé
2022-10-31 15:48 ` Michael S. Tsirkin
2022-11-01 12:57 ` Igor Mammedov
2022-11-01 13:03 ` Daniel P. Berrangé
2022-11-10 16:29 ` Michael S. Tsirkin
2022-11-10 18:21 ` Daniel P. Berrangé
2022-11-10 16:30 ` Michael S. Tsirkin
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