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From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: f4bug@amsat.org, "Alex Bennée" <alex.bennee@linaro.org>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>
Subject: [PATCH  v5 20/20] include/hw: add commentary to current_cpu export
Date: Fri, 11 Nov 2022 18:25:35 +0000	[thread overview]
Message-ID: <20221111182535.64844-21-alex.bennee@linaro.org> (raw)
In-Reply-To: <20221111182535.64844-1-alex.bennee@linaro.org>

Document the intended use of current_cpu and discourage its use in new
HW emulation code. Once we have fully converted the tree we should
probably move this extern to another header.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 include/hw/core/cpu.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 8830546121..209b88e559 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -454,6 +454,20 @@ extern CPUTailQ cpus;
 #define CPU_FOREACH_SAFE(cpu, next_cpu) \
     QTAILQ_FOREACH_SAFE_RCU(cpu, &cpus, node, next_cpu)
 
+/**
+ * current_cpu - TLS pointing to the current executing CPU
+ *
+ * current_cpu is a thread local convenience variable containing that
+ * threads executing CPUState. It is intended to be used deep in
+ * accelerator related operations where passing down CPUState is too
+ * fiddly.
+ *
+ * Its use in HW emulation is heavily discouraged in new code as not
+ * all memory accesses will necessarily be from an executing CPU (e.g.
+ * from a debugger). HW emulation should be using MemTxAttrs to derive
+ * the exact source of a memory access. If the access is from a CPU it
+ * can be derived from qemu_get_cpu(cpu_index).
+ */
 extern __thread CPUState *current_cpu;
 
 /**
-- 
2.34.1



  parent reply	other threads:[~2022-11-11 18:37 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-11 18:25 [PATCH for 8.0 v5 00/20] use MemTxAttrs to avoid current_cpu in hw/ Alex Bennée
2022-11-11 18:25 ` [PATCH v5 01/20] hw: encode accessing CPU index in MemTxAttrs Alex Bennée
2022-11-12  4:18   ` Richard Henderson
2022-11-21 18:32   ` Peter Maydell
2022-11-11 18:25 ` [PATCH v5 02/20] target/arm: ensure TCG IO accesses set appropriate MemTxAttrs Alex Bennée
2022-11-11 18:25   ` Alex Bennée
2022-11-12  5:17   ` Richard Henderson
2022-11-12  5:26   ` Richard Henderson
2022-11-11 18:25 ` [PATCH v5 03/20] target/arm: ensure HVF traps " Alex Bennée
2022-11-11 18:25   ` Alex Bennée
2022-11-11 18:25 ` [PATCH v5 04/20] target/arm: ensure KVM " Alex Bennée
2022-11-11 18:25   ` Alex Bennée
2022-11-12  5:29   ` Richard Henderson
2022-11-11 18:25 ` [PATCH v5 05/20] target/arm: ensure m-profile helpers " Alex Bennée
2022-11-11 18:25   ` Alex Bennée
2022-11-12  5:26   ` Richard Henderson
2022-11-11 18:25 ` [PATCH v5 06/20] qtest: make read/write operation appear to be from CPU Alex Bennée
2022-11-11 18:25 ` [PATCH v5 07/20] hw/intc/gic: use MxTxAttrs to divine accessing CPU Alex Bennée
2022-11-11 18:25 ` [PATCH v5 08/20] hw/timer: convert mptimer access to attrs to derive cpu index Alex Bennée
2022-11-11 18:25   ` Alex Bennée
2022-11-11 18:25 ` [PATCH v5 09/20] hw/arm: remove current_cpu hack from pxa2xx access Alex Bennée
2022-11-12  5:36   ` Richard Henderson
2022-11-13 19:43   ` Philippe Mathieu-Daudé
2022-11-11 18:25 ` [PATCH v5 10/20] target/microblaze: initialise MemTxAttrs for CPU access Alex Bennée
2022-11-11 19:41   ` Edgar E. Iglesias
2022-11-12  5:37   ` Richard Henderson
2022-11-13 19:44   ` Philippe Mathieu-Daudé
2022-11-11 18:25 ` [PATCH v5 11/20] target/sparc: " Alex Bennée
2022-11-12  1:02   ` Mark Cave-Ayland
2022-11-12  5:38   ` Richard Henderson
2022-11-13 19:45   ` Philippe Mathieu-Daudé
2022-11-11 18:25 ` [PATCH v5 12/20] target/riscv: " Alex Bennée
2022-11-11 18:25 ` [PATCH v5 13/20] target/i386: add explicit initialisation for MexTxAttrs Alex Bennée
2022-11-11 18:25   ` Alex Bennée
2022-11-12  5:49   ` Richard Henderson
2022-11-11 18:25 ` [PATCH v5 14/20] hw/audio: explicitly set .requester_type for intel-hda Alex Bennée
2022-11-12  5:50   ` Richard Henderson
2022-11-13 19:50     ` Philippe Mathieu-Daudé
2022-11-21 18:39   ` Peter Maydell
2022-11-21 22:14     ` Philippe Mathieu-Daudé
2022-11-11 18:25 ` [PATCH v5 15/20] hw/i386: update vapic_write to use MemTxAttrs Alex Bennée
2022-11-12  5:51   ` Richard Henderson
2022-11-13 19:52   ` Philippe Mathieu-Daudé
2022-11-11 18:25 ` [PATCH v5 16/20] include: add MEMTXATTRS_MACHINE helper Alex Bennée
2022-11-12  5:52   ` Richard Henderson
2022-11-11 18:25 ` [PATCH v5 17/20] hw/intc: properly model IOAPIC MSI messages Alex Bennée
2022-11-12  5:57   ` Richard Henderson
2022-11-11 18:25 ` [PATCH v5 18/20] hw/i386: convert apic access to use MemTxAttrs Alex Bennée
2022-11-12  6:02   ` Richard Henderson
2022-11-21 18:43   ` Peter Maydell
2022-11-11 18:25 ` [PATCH v5 19/20] hw/isa: derive CPUState from MemTxAttrs in apm_ioport_writeb Alex Bennée
2022-11-12  6:04   ` Richard Henderson
2022-11-13 20:04   ` Philippe Mathieu-Daudé
2022-11-11 18:25 ` Alex Bennée [this message]
2022-11-12  6:05   ` [PATCH v5 20/20] include/hw: add commentary to current_cpu export Richard Henderson

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