From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 57B31C4332F for ; Sat, 12 Nov 2022 21:46:28 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6726785155; Sat, 12 Nov 2022 22:46:26 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=volkov.fr Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=volkov.fr header.i=@volkov.fr header.b="imgZRfhS"; dkim=pass (2048-bit key) header.d=volkov.fr header.i=@volkov.fr header.b="BqzsGNNK"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A39FC85152; Sat, 12 Nov 2022 22:46:24 +0100 (CET) Received: from mail.volkov.fr (sapphire.volkov.fr [3.18.100.122]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4291485107 for ; Sat, 12 Nov 2022 22:46:21 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=volkov.fr Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andrey@volkov.fr DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=volkov.fr; s=mail; t=1668289579; bh=LtPXE5kLenUI5VpkYKOhL1bRyrElwapg6SaYyn9wdqU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=imgZRfhSP+7MCfqkL3NZfu4iKJAgr+JBLL9oRFCZ4ZmTuZfdkjDS27EJ0mRYm+JJE VSk/43QcaoFt4+ORPvsR82Gr9uwPntG63ydNw3qmOtFBGThbQlny1NSej+zArm9Sq8 LuE49Rbr1vER8fxhiaIOXOJefEcR4iHEUaSomAEpWGkdpQ0HokS4nzqtCY4ptw8cnq dglKPHr5UpcmgzuQZQ7aC05JbYEWIxJwmoD7JRsO5hDURJJiexVd/4AI+7iGalV71t KWJpf4x9DiYUJHMHji0uLIvIfDKy1lETRhvRmHF68P6y9o8SSLHr5B8x80NP2iESk6 iMfB2bTW41i5Q== Authentication-Results: mail.volkov.fr; dmarc=none (p=none dis=none) header.from=volkov.fr DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=volkov.fr; s=mail; t=1668289577; bh=LtPXE5kLenUI5VpkYKOhL1bRyrElwapg6SaYyn9wdqU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BqzsGNNK6PWf9OcOBbQ2rmp/Zbb5VgcYTxrWATOuF8guhNh17d+h3/BPfj0ztzAs4 2SHEAQfLtrIAGjMWdRcbdORxNlrgOqdrpZTjEoOzxEaU/DcWyJWvqwoOrSUNk1WDFX /7PiaIVsw+oYITQ6XGGdq0nzkOuqh95VrOiqT2DeaFSdmZZ95N7yXDKSMegqrV/TLj JPI97SJYJCdxpX3MtO0uQpkIuj1dm7dpXrxqV8U2ODu+F1I2ExDOR8Vmm7wB9XhLvT tUfbsHVdsicAoIzGlVqQni7cncpFOejmRZeCX3GVTDVijVRO9s6YASLvDVdeL5vF4i fF1aawAgaakYA== From: Andrey VOLKOV To: Tom Rini , Robert Marko Cc: Ramon Fried , u-boot@lists.denx.de, Andrey VOLKOV Subject: [PATCH v3 1/2] SoC: qcom: Add missing Qualcomm's SOCs definitions to the arch KConfig Date: Sat, 12 Nov 2022 22:46:07 +0100 Message-Id: <20221112214608.793120-2-andrey@volkov.fr> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Add APQ8016/APQ8096/QCS40X decls to the KConfig, convert SDM845 declaration to the hidden one (selected by target), and update mach-snapdragon/Makefile accordingly. Also move 'CONFIG_ARM64' choice to the new declarations, since 'Snapdragon' contains Cortex A7A members too. Signed-off-by: Andrey VOLKOV --- arch/arm/Kconfig | 1 - arch/arm/mach-snapdragon/Kconfig | 23 ++++++++++++-- arch/arm/mach-snapdragon/Makefile | 31 ++++++++++--------- arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 10 +++++- drivers/reset/reset-qcom.c | 2 +- 5 files changed, 48 insertions(+), 19 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7866e8f3c4..d575014aaf 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1076,7 +1076,6 @@ config ARCH_RMOBILE config ARCH_SNAPDRAGON bool "Qualcomm Snapdragon SoCs" - select ARM64 select DM select DM_GPIO select DM_SERIAL diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 0927333306..83dd2c07a1 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -9,10 +9,27 @@ config SYS_MALLOC_F_LEN config SPL_SYS_MALLOC_F_LEN default 0x2000 +config APQ8016 + bool + select ARM64 + default n + +config APQ8096 + bool + select ARM64 + default n + config SDM845 - bool "Qualcomm Snapdragon 845 SoC" + bool + select ARM64 + select LINUX_KERNEL_IMAGE_HEADER default n + +config QCS40X + bool + select ARM64 select LINUX_KERNEL_IMAGE_HEADER + default n config LNX_KRNL_IMG_TEXT_OFFSET_BASE default 0x80000000 @@ -23,6 +40,7 @@ choice config TARGET_DRAGONBOARD410C bool "96Boards Dragonboard 410C" select BOARD_LATE_INIT + select APQ8016 select ENABLE_ARM_SOC_BOOT0_HOOK help Support for 96Boards Dragonboard 410C. This board complies with @@ -37,6 +55,7 @@ config TARGET_DRAGONBOARD410C config TARGET_DRAGONBOARD820C bool "96Boards Dragonboard 820C" + select APQ8096 help Support for 96Boards Dragonboard 820C. This board complies with 96Board Open Platform Specifications. Features: @@ -71,7 +90,7 @@ config TARGET_STARQLTECHN config TARGET_QCS404EVB bool "Qualcomm Technologies, Inc. QCS404 EVB" - select LINUX_KERNEL_IMAGE_HEADER + select QCS40X help Support for Qualcomm Technologies, Inc. QCS404 evaluation board. Features: diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index cbaaf23f6b..00997196ab 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -2,20 +2,23 @@ # # (C) Copyright 2015 Mateusz Kulikowski +obj-y += clock-snapdragon.o +obj-y += pinctrl-snapdragon.o + obj-$(CONFIG_SDM845) += clock-sdm845.o obj-$(CONFIG_SDM845) += sysmap-sdm845.o obj-$(CONFIG_SDM845) += init_sdm845.o -obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o -obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o -obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o -obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o -obj-y += misc.o -obj-y += clock-snapdragon.o -obj-y += dram.o -obj-y += pinctrl-snapdragon.o -obj-y += pinctrl-apq8016.o -obj-y += pinctrl-apq8096.o -obj-y += pinctrl-qcs404.o -obj-y += pinctrl-sdm845.o -obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o -obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o +obj-$(CONFIG_SDM845) += pinctrl-sdm845.o + +obj-$(CONFIG_APQ8096) += clock-apq8096.o +obj-$(CONFIG_APQ8096) += sysmap-apq8096.o +obj-$(CONFIG_APQ8096) += pinctrl-apq8096.o + +obj-$(CONFIG_APQ8016) += clock-apq8016.o +obj-$(CONFIG_APQ8016) += sysmap-apq8016.o +obj-$(CONFIG_APQ8016) += pinctrl-apq8016.o +obj-$(CONFIG_APQ8016) += misc.o dram.o + +obj-$(CONFIG_QCS40X) += clock-qcs404.o +obj-$(CONFIG_QCS40X) += sysmap-qcs404.o +obj-$(CONFIG_QCS40X) += pinctrl-qcs404.o diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c index ab884ab6bf..0740993b61 100644 --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c @@ -142,14 +142,22 @@ static int msm_pinctrl_bind(struct udevice *dev) } static const struct udevice_id msm_pinctrl_ids[] = { +#ifdef CONFIG_APQ8016 { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data }, +#endif +#ifdef CONFIG_APQ8096 { .compatible = "qcom,msm8996-pinctrl", .data = (ulong)&apq8096_data }, +#endif +#ifdef CONFIG_SDM845 { .compatible = "qcom,sdm845-pinctrl", .data = (ulong)&sdm845_data }, +#endif +#ifdef CONFIG_QCS40X { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data }, +#endif { } }; -U_BOOT_DRIVER(pinctrl_snapdraon) = { +U_BOOT_DRIVER(pinctrl_snapdragon) = { .name = "pinctrl_msm", .id = UCLASS_PINCTRL, .of_match = msm_pinctrl_ids, diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c index 94315e76d5..2c61d6a6dc 100644 --- a/drivers/reset/reset-qcom.c +++ b/drivers/reset/reset-qcom.c @@ -102,7 +102,7 @@ static const struct qcom_reset_map gcc_qcom_resets[] = { }; #endif -#ifdef CONFIG_TARGET_QCS404EVB +#ifdef CONFIG_QCS40X #include static const struct qcom_reset_map gcc_qcom_resets[] = { [GCC_GENI_IR_BCR] = { 0x0F000 }, -- 2.34.1