From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1B518C4332F for ; Sat, 19 Nov 2022 02:12:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E7D610E257; Sat, 19 Nov 2022 02:12:45 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91D0210E255; Sat, 19 Nov 2022 02:12:40 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0D0A162837; Sat, 19 Nov 2022 02:12:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EEB0EC433C1; Sat, 19 Nov 2022 02:12:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668823959; bh=DGpi5bOY4QODa+uCmcve2tFg2aWUelF3/ruWIkrknEM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OacmNl3E/L37sdI4hhgEOJ6jivQOSceUSVgK8s6q/PxwepfluU8cDnPgJKpXTGoku Jy9Z2MRXYZj0USuZdkcxgYZ+qhSvXJsmb7DfQiU1PaGqbY3/wGgMicQvSMnyYXFUvM DSB50N/j73/r/Oql7g4fHv1ju4ue1kG+McwPRBn5DKage3VKmHZGPAb4Hktc6ZmL9q hLcMBjb10JMsXp74+FUdjdXc2pVyF2j9HDCMMmAmxZXxZk7DwZp/h8XlF5u5ke5vPv Ihf4tGUyK83cPWZRbgYgaK6G/qTkAgpnzRnfj09rPXL4FxHN5JGe3ahZgKtuFj6Ino mZD42PcOMnh9w== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH AUTOSEL 6.0 34/44] drm/amd/display: Zeromem mypipe heap struct before using it Date: Fri, 18 Nov 2022 21:11:14 -0500 Message-Id: <20221119021124.1773699-34-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221119021124.1773699-1-sashal@kernel.org> References: <20221119021124.1773699-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alan Liu , Sasha Levin , george.shen@amd.com, sunpeng.li@amd.com, airlied@gmail.com, dri-devel@lists.freedesktop.org, Xinhui.Pan@amd.com, Rodrigo.Siqueira@amd.com, amd-gfx@lists.freedesktop.org, nathan@kernel.org, Daniel Wheeler , Aurabindo Pillai , Alvin.Lee2@amd.com, daniel@ffwll.ch, Martin Leung , Alex Deucher , jun.lei@amd.com, harry.wentland@amd.com, christian.koenig@amd.com Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" From: Aurabindo Pillai [ Upstream commit ab4b35008db9b7ae747679250e5c26d7c3a90cea ] [Why&How] Bug was caused when moving variable from stack to heap because it was reusable and garbage was left over, so we need to zero mem. Reviewed-by: Martin Leung Acked-by: Alan Liu Signed-off-by: Aurabindo Pillai Signed-off-by: Martin Leung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 52525833a99b..96714dc6b695 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -3194,6 +3194,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.FCLKChangeLatency, mode_lib->vba.UrgLatency[i], mode_lib->vba.SREnterPlusExitTime); + memset(&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull, 0, sizeof(DmlPipe)); v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dppclk = mode_lib->vba.RequiredDPPCLK[i][j][k]; v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dispclk = mode_lib->vba.RequiredDISPCLK[i][j]; v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.PixelClock = mode_lib->vba.PixelClock[k]; -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21D48C433FE for ; Sat, 19 Nov 2022 02:15:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232854AbiKSCPy (ORCPT ); Fri, 18 Nov 2022 21:15:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232804AbiKSCPF (ORCPT ); Fri, 18 Nov 2022 21:15:05 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9284A809BA; Fri, 18 Nov 2022 18:12:42 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 15490B82670; Sat, 19 Nov 2022 02:12:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EEB0EC433C1; Sat, 19 Nov 2022 02:12:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668823959; bh=DGpi5bOY4QODa+uCmcve2tFg2aWUelF3/ruWIkrknEM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OacmNl3E/L37sdI4hhgEOJ6jivQOSceUSVgK8s6q/PxwepfluU8cDnPgJKpXTGoku Jy9Z2MRXYZj0USuZdkcxgYZ+qhSvXJsmb7DfQiU1PaGqbY3/wGgMicQvSMnyYXFUvM DSB50N/j73/r/Oql7g4fHv1ju4ue1kG+McwPRBn5DKage3VKmHZGPAb4Hktc6ZmL9q hLcMBjb10JMsXp74+FUdjdXc2pVyF2j9HDCMMmAmxZXxZk7DwZp/h8XlF5u5ke5vPv Ihf4tGUyK83cPWZRbgYgaK6G/qTkAgpnzRnfj09rPXL4FxHN5JGe3ahZgKtuFj6Ino mZD42PcOMnh9w== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Aurabindo Pillai , Martin Leung , Alan Liu , Daniel Wheeler , Alex Deucher , Sasha Levin , harry.wentland@amd.com, sunpeng.li@amd.com, Rodrigo.Siqueira@amd.com, christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com, daniel@ffwll.ch, Alvin.Lee2@amd.com, jun.lei@amd.com, nathan@kernel.org, george.shen@amd.com, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH AUTOSEL 6.0 34/44] drm/amd/display: Zeromem mypipe heap struct before using it Date: Fri, 18 Nov 2022 21:11:14 -0500 Message-Id: <20221119021124.1773699-34-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221119021124.1773699-1-sashal@kernel.org> References: <20221119021124.1773699-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Aurabindo Pillai [ Upstream commit ab4b35008db9b7ae747679250e5c26d7c3a90cea ] [Why&How] Bug was caused when moving variable from stack to heap because it was reusable and garbage was left over, so we need to zero mem. Reviewed-by: Martin Leung Acked-by: Alan Liu Signed-off-by: Aurabindo Pillai Signed-off-by: Martin Leung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 52525833a99b..96714dc6b695 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -3194,6 +3194,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.FCLKChangeLatency, mode_lib->vba.UrgLatency[i], mode_lib->vba.SREnterPlusExitTime); + memset(&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull, 0, sizeof(DmlPipe)); v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dppclk = mode_lib->vba.RequiredDPPCLK[i][j][k]; v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dispclk = mode_lib->vba.RequiredDISPCLK[i][j]; v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.PixelClock = mode_lib->vba.PixelClock[k]; -- 2.35.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 696CFC4332F for ; Sat, 19 Nov 2022 02:12:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 818B910E255; Sat, 19 Nov 2022 02:12:42 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91D0210E255; Sat, 19 Nov 2022 02:12:40 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 0D0A162837; Sat, 19 Nov 2022 02:12:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EEB0EC433C1; Sat, 19 Nov 2022 02:12:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668823959; bh=DGpi5bOY4QODa+uCmcve2tFg2aWUelF3/ruWIkrknEM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OacmNl3E/L37sdI4hhgEOJ6jivQOSceUSVgK8s6q/PxwepfluU8cDnPgJKpXTGoku Jy9Z2MRXYZj0USuZdkcxgYZ+qhSvXJsmb7DfQiU1PaGqbY3/wGgMicQvSMnyYXFUvM DSB50N/j73/r/Oql7g4fHv1ju4ue1kG+McwPRBn5DKage3VKmHZGPAb4Hktc6ZmL9q hLcMBjb10JMsXp74+FUdjdXc2pVyF2j9HDCMMmAmxZXxZk7DwZp/h8XlF5u5ke5vPv Ihf4tGUyK83cPWZRbgYgaK6G/qTkAgpnzRnfj09rPXL4FxHN5JGe3ahZgKtuFj6Ino mZD42PcOMnh9w== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH AUTOSEL 6.0 34/44] drm/amd/display: Zeromem mypipe heap struct before using it Date: Fri, 18 Nov 2022 21:11:14 -0500 Message-Id: <20221119021124.1773699-34-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221119021124.1773699-1-sashal@kernel.org> References: <20221119021124.1773699-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alan Liu , Sasha Levin , george.shen@amd.com, sunpeng.li@amd.com, dri-devel@lists.freedesktop.org, Xinhui.Pan@amd.com, Rodrigo.Siqueira@amd.com, amd-gfx@lists.freedesktop.org, nathan@kernel.org, Daniel Wheeler , Aurabindo Pillai , Alvin.Lee2@amd.com, Martin Leung , Alex Deucher , jun.lei@amd.com, christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Aurabindo Pillai [ Upstream commit ab4b35008db9b7ae747679250e5c26d7c3a90cea ] [Why&How] Bug was caused when moving variable from stack to heap because it was reusable and garbage was left over, so we need to zero mem. Reviewed-by: Martin Leung Acked-by: Alan Liu Signed-off-by: Aurabindo Pillai Signed-off-by: Martin Leung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c index 52525833a99b..96714dc6b695 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c @@ -3194,6 +3194,7 @@ void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l mode_lib->vba.FCLKChangeLatency, mode_lib->vba.UrgLatency[i], mode_lib->vba.SREnterPlusExitTime); + memset(&v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull, 0, sizeof(DmlPipe)); v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dppclk = mode_lib->vba.RequiredDPPCLK[i][j][k]; v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dispclk = mode_lib->vba.RequiredDISPCLK[i][j]; v->dummy_vars.dml32_ModeSupportAndSystemConfigurationFull.myPipe.PixelClock = mode_lib->vba.PixelClock[k]; -- 2.35.1