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[2603:6081:7b00:6400:55ec:b699:c19f:3363]) by smtp.gmail.com with ESMTPSA id y11-20020a37f60b000000b006ce1bfbd603sm5169743qkj.124.2022.11.19.15.45.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Nov 2022 15:45:59 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Cc: Uri Mashiach Subject: [PATCH 23/38] Convert CONFIG_PCA953X to Kconfig Date: Sat, 19 Nov 2022 18:45:30 -0500 Message-Id: <20221119234545.404563-23-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221119234545.404563-1-trini@konsulko.com> References: <20221119234545.404563-1-trini@konsulko.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean This converts the following to Kconfig: CONFIG_PCA953X Cc: Uri Mashiach Signed-off-by: Tom Rini --- The only user of the non-DM GPIO driver here is the cl-som-imx7, and in turn also the "pca953x" command. I think with a dts resync the DM GPIO driver should just work however? --- README | 2 -- configs/cl-som-imx7_defconfig | 1 + drivers/gpio/Kconfig | 4 ++++ include/configs/cl-som-imx7.h | 1 - include/configs/imx8qxp_mek.h | 4 ---- include/configs/mx6sabreauto.h | 1 - 6 files changed, 5 insertions(+), 8 deletions(-) diff --git a/README b/README index 0a7635d1a24d..eb76c73ac3d0 100644 --- a/README +++ b/README @@ -483,8 +483,6 @@ The following options need to be configured: must also be configured. See I2C Support, below. - GPIO Support: - CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO - The CFG_SYS_I2C_PCA953X_WIDTH option specifies a list of chip-ngpio pairs that tell the PCA953X driver the number of pins supported by a particular chip. diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 3571dba6d2ae..d1a044e3f7ba 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -74,6 +74,7 @@ CONFIG_ETHPRIME="FEC" CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_CMD_PCA953X=y +CONFIG_PCA953X=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index e007b38fac71..1e4b50ef72b5 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -520,6 +520,10 @@ config SPL_DM_PCA953X Now, max 24 bits chips and PCA953X compatible chips are supported +config PCA953X + bool "NXP's PCA953X series I2C GPIO (legacy driver)" + depends on !DM_PCA953X + config MPC8XXX_GPIO bool "Freescale MPC8XXX GPIO driver" depends on DM_GPIO diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 4aaa52f26980..5c9004cbd93a 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -21,7 +21,6 @@ /* PMIC */ #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 -#define CONFIG_PCA953X #define CFG_SYS_I2C_PCA953X_ADDR 0x20 #define CFG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} } diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 19f1dba04706..d75b8bf0c18f 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -110,10 +110,6 @@ /* LPDDR4 board total DDR is 3GB */ #define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */ -#ifndef CONFIG_DM_PCA953X -#define CONFIG_PCA953X -#endif - /* Misc configuration */ #endif /* __IMX8QXP_MEK_H */ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index f5f95a1bd1ce..888da7ce365f 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -15,7 +15,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -#define CONFIG_PCA953X #define CFG_SYS_I2C_PCA953X_WIDTH { {0x30, 8}, {0x32, 8}, {0x34, 8} } #include "mx6sabre_common.h" -- 2.25.1