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[2603:6081:7b00:6400:29a0:35f:b06a:235e]) by smtp.gmail.com with ESMTPSA id bk23-20020a05620a1a1700b006ce580c2663sm6387502qkb.35.2022.11.20.06.08.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Nov 2022 06:08:31 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PoC 111/241] global: Migrate CONFIG_MAX_DSP_CPUS to CFG Date: Sun, 20 Nov 2022 09:07:01 -0500 Message-Id: <20221120140829.3057894-2-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221120140829.3057894-1-trini@konsulko.com> References: <20221120135520.3057773-4-trini@konsulko.com> <20221120140829.3057894-1-trini@konsulko.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Tom Rini --- arch/powerpc/include/asm/config_mpc85xx.h | 4 ++-- doc/README.Heterogeneous-SoCs | 2 +- include/e500.h | 2 +- scripts/config_whitelist.txt | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index d6b2b9b469a3..9738c573452b 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -152,7 +152,7 @@ #define CFG_SYS_FM_MURAM_SIZE 0x60000 #ifdef CONFIG_ARCH_B4860 -#define CONFIG_MAX_DSP_CPUS 12 +#define CFG_MAX_DSP_CPUS 12 #define CONFIG_NUM_DSP_CPUS 6 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 } #define CFG_SYS_NUM_FM1_DTSEC 6 @@ -161,7 +161,7 @@ #define CFG_SYS_FSL_SRIO_OB_WIN_NUM 9 #define CFG_SYS_FSL_SRIO_IB_WIN_NUM 5 #else -#define CONFIG_MAX_DSP_CPUS 2 +#define CFG_MAX_DSP_CPUS 2 #define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 } #define CFG_SYS_NUM_FM1_DTSEC 4 #define CFG_SYS_NUM_FM1_10GEC 0 diff --git a/doc/README.Heterogeneous-SoCs b/doc/README.Heterogeneous-SoCs index 9da652e459be..11f2dbc0013d 100644 --- a/doc/README.Heterogeneous-SoCs +++ b/doc/README.Heterogeneous-SoCs @@ -72,7 +72,7 @@ CONFIG_SYS_ETVPE_CLK - Define PLL index for ETVPE clock DSP cores and other device's components have been added in this structure. -freq_processor_dsp[CONFIG_MAX_DSP_CPUS] - Array to contain the DSP core's frequencies +freq_processor_dsp[CFG_MAX_DSP_CPUS] - Array to contain the DSP core's frequencies freq_cpri - To store CPRI frequency freq_maple - To store MAPLE frequency freq_maple_ulb - To store MAPLE-ULB frequency diff --git a/include/e500.h b/include/e500.h index 9f68a834c2f0..9ea90109406c 100644 --- a/include/e500.h +++ b/include/e500.h @@ -12,7 +12,7 @@ typedef struct { unsigned long freq_processor[CONFIG_MAX_CPUS]; #ifdef CONFIG_HETROGENOUS_CLUSTERS - unsigned long freq_processor_dsp[CONFIG_MAX_DSP_CPUS]; + unsigned long freq_processor_dsp[CFG_MAX_DSP_CPUS]; #endif unsigned long freq_systembus; unsigned long freq_ddrbus; diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index c72372a11ddc..31484bd13fd9 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -119,7 +119,7 @@ CFG_LPC32XX_NAND_SLC_WWIDTH CFG_MACB_SEARCH_PHY CFG_MALLOC_F_ADDR CFG_MALTA -CONFIG_MAX_DSP_CPUS +CFG_MAX_DSP_CPUS CONFIG_MAX_MEM_MAPPED CONFIG_MAX_RAM_BANK_SIZE CONFIG_MEMSIZE_IN_BYTES -- 2.25.1