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[2603:6081:7b00:6400:29a0:35f:b06a:235e]) by smtp.gmail.com with ESMTPSA id bk23-20020a05620a1a1700b006ce580c2663sm6387502qkb.35.2022.11.20.06.08.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Nov 2022 06:08:52 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PoC 147/241] global: Migrate CONFIG_PHY_INTERFACE_MODE to CFG Date: Sun, 20 Nov 2022 09:07:37 -0500 Message-Id: <20221120140829.3057894-38-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221120140829.3057894-1-trini@konsulko.com> References: <20221120135520.3057773-4-trini@konsulko.com> <20221120140829.3057894-1-trini@konsulko.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Tom Rini --- include/configs/socfpga_sr1500.h | 2 +- scripts/config_whitelist.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index 432144cb40ce..70df27241ca6 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -11,7 +11,7 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SR1500 */ /* Ethernet on SoC (EMAC) */ -#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII +#define CFG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII /* The PHY is autodetected, so no MII PHY address is needed here */ #define PHY_ANEG_TIMEOUT 8000 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 664b59d44050..9438ee6afdd7 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -156,7 +156,7 @@ CFG_PEN_ADDR_BIG_ENDIAN CFG_PHY_BASE_ADR CFG_PHY_ET1011C_TX_CLK_FIX CFG_PHY_ID -CONFIG_PHY_INTERFACE_MODE +CFG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE CONFIG_PL011_CLOCK CONFIG_PL01x_PORTS -- 2.25.1