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[2603:6081:7b00:6400:29a0:35f:b06a:235e]) by smtp.gmail.com with ESMTPSA id bk23-20020a05620a1a1700b006ce580c2663sm6387502qkb.35.2022.11.20.06.09.15 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Nov 2022 06:09:15 -0800 (PST) From: Tom Rini To: u-boot@lists.denx.de Subject: [PoC 180/241] global: Migrate CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG Date: Sun, 20 Nov 2022 09:08:10 -0500 Message-Id: <20221120140829.3057894-71-trini@konsulko.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221120140829.3057894-1-trini@konsulko.com> References: <20221120135520.3057773-4-trini@konsulko.com> <20221120140829.3057894-1-trini@konsulko.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Signed-off-by: Tom Rini --- drivers/net/sh_eth.c | 2 +- include/configs/alt.h | 2 +- include/configs/condor.h | 2 +- include/configs/gose.h | 2 +- include/configs/grpeach.h | 2 +- include/configs/koelsch.h | 2 +- include/configs/lager.h | 2 +- include/configs/porter.h | 2 +- include/configs/silk.h | 2 +- include/configs/stout.h | 2 +- scripts/config_whitelist.txt | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 0f91ad4128cd..38049b380d7c 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -48,7 +48,7 @@ #define flush_cache_wback(...) #endif -#if defined(CONFIG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) +#if defined(CFG_SH_ETHER_CACHE_INVALIDATE) && defined(CONFIG_ARM) #define invalidate_cache(addr, len) \ { \ unsigned long line_size = CFG_SH_ETHER_ALIGNE_SIZE; \ diff --git a/include/configs/alt.h b/include/configs/alt.h index 846e755f1b62..940169b42043 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -28,7 +28,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/condor.h b/include/configs/condor.h index 6d7c788163d3..fa3edef9b300 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -18,7 +18,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/gose.h b/include/configs/gose.h index 93157de470bd..e54f4b24e048 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index 5b91e6ff039b..5ae17f70e909 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -21,7 +21,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 #endif /* __GRPEACH_H */ diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index ff02a875013c..1d8aa6def88f 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -24,7 +24,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 83e8705dfe76..bb8cc5fecb7a 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -25,7 +25,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/porter.h b/include/configs/porter.h index ec70c76f46b0..907cf29d0318 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -29,7 +29,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 4da7e7141336..7361daa27c49 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -29,7 +29,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/include/configs/stout.h b/include/configs/stout.h index a071d1425bb3..b60e363b2c7c 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -33,7 +33,7 @@ #define CONFIG_SH_ETHER_PHY_ADDR 0x1 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII #define CONFIG_SH_ETHER_CACHE_WRITEBACK -#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CFG_SH_ETHER_CACHE_INVALIDATE #define CFG_SH_ETHER_ALIGNE_SIZE 64 /* Board Clock */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 0c8b3c62f23b..8627d6a91aa6 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -189,7 +189,7 @@ CFG_SERVERIP CFG_SETUP_INITRD_TAG CFG_SET_DFU_ALT_BUF_LEN CFG_SH_ETHER_ALIGNE_SIZE -CONFIG_SH_ETHER_CACHE_INVALIDATE +CFG_SH_ETHER_CACHE_INVALIDATE CONFIG_SH_ETHER_CACHE_WRITEBACK CONFIG_SH_ETHER_PHY_ADDR CONFIG_SH_ETHER_PHY_MODE -- 2.25.1