Re: [PATCH] MIPS: DTS: CI20: fix reset line polarity of the ethernet controller

[Thomas Bogendoerfer <tsbogend@alpha.franken.de>]

On Fri, Nov 18, 2022 at 08:43:47AM -0800, Dmitry Torokhov wrote:
> The reset line is called PWRST#, annotated as "active low" in the
> binding documentation, and is driven low and then high by the driver to
> reset the chip. However in device tree for CI20 board it was incorrectly
> marked as "active high". Fix it.
> 
> Because (as far as I know) the ci20.dts is always built in the kernel I
> elected not to also add a quirk to gpiolib to force the polarity there.
> 
> Fixes: db49ca38579d ("net: davicom: dm9000: switch to using gpiod API")
> Reported-by: Paul Cercueil <paul@crapouillou.net>
> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
> ---
>  arch/mips/boot/dts/ingenic/ci20.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
> index 37c46720c719..f38c39572a9e 100644
> --- a/arch/mips/boot/dts/ingenic/ci20.dts
> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
> @@ -438,7 +438,7 @@ dm9000@6 {
>  		ingenic,nemc-tAW = <50>;
>  		ingenic,nemc-tSTRV = <100>;
>  
> -		reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
> +		reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>;
>  		vcc-supply = <&eth0_power>;
>  
>  		interrupt-parent = <&gpe>;
> -- 
> 2.38.1.584.g0f3c55d4c2-goog

applied to mips-next.

Thomas.

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