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From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Christoph Hellwig <hch@infradead.org>,
	Damien Le Moal <damien.lemoal@opensource.wdc.com>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Heiko Stuebner <heiko@sntech.de>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Samuel Holland <samuel@sholland.org>
Subject: [PATCH v1 4/7] RISC-V: stop selecting SIFIVE_PLIC at the SoC level
Date: Mon, 21 Nov 2022 22:14:12 +0000	[thread overview]
Message-ID: <20221121221414.109965-5-conor@kernel.org> (raw)
In-Reply-To: <20221121221414.109965-1-conor@kernel.org>

From: Conor Dooley <conor.dooley@microchip.com>

The SIFIVE_PLIC driver is used by all current RISC-V SoCs & will be,
where possible, used for future implementations. Rather than having each
SoC select the option in Kconfig.socs, do so at the arch level.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 arch/riscv/Kconfig      | 1 +
 arch/riscv/Kconfig.socs | 5 -----
 2 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fec54872ab45..d7334e02d20b 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -125,6 +125,7 @@ config RISCV
 	select PCI_MSI if PCI
 	select RISCV_INTC
 	select RISCV_TIMER if RISCV_SBI
+	select SIFIVE_PLIC
 	select SPARSE_IRQ
 	select SYSCTL_EXCEPTION_TRACE
 	select THREAD_INFO_IN_TASK
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index 203d1c528ef4..ce920f627f6d 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -6,7 +6,6 @@ config ARCH_MICROCHIP_POLARFIRE
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
 	select MCHP_CLK_MPFS
-	select SIFIVE_PLIC
 	help
 	  This enables support for Microchip PolarFire SoC platforms.
 
@@ -24,7 +23,6 @@ config SOC_SIFIVE
 	select SERIAL_SIFIVE_CONSOLE if TTY
 	select CLK_SIFIVE
 	select CLK_SIFIVE_PRCI
-	select SIFIVE_PLIC
 	select ERRATA_SIFIVE if !XIP_KERNEL
 	help
 	  This enables support for SiFive SoC platform hardware.
@@ -36,7 +34,6 @@ config SOC_STARFIVE
 	bool "StarFive SoCs"
 	select PINCTRL
 	select RESET_CONTROLLER
-	select SIFIVE_PLIC
 	help
 	  This enables support for StarFive SoC platform hardware.
 
@@ -51,7 +48,6 @@ config SOC_VIRT
 	select POWER_RESET_SYSCON_POWEROFF
 	select GOLDFISH
 	select RTC_DRV_GOLDFISH if RTC_CLASS
-	select SIFIVE_PLIC
 	select PM_GENERIC_DOMAINS if PM
 	select PM_GENERIC_DOMAINS_OF if PM && OF
 	select RISCV_SBI_CPUIDLE if CPU_IDLE && RISCV_SBI
@@ -67,7 +63,6 @@ config SOC_CANAAN
 	select CLINT_TIMER if RISCV_M_MODE
 	select SERIAL_SIFIVE if TTY
 	select SERIAL_SIFIVE_CONSOLE if TTY
-	select SIFIVE_PLIC
 	select ARCH_HAS_RESET_CONTROLLER
 	select PINCTRL
 	select COMMON_CLK
-- 
2.37.2


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  parent reply	other threads:[~2022-11-21 22:18 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-21 22:14 [PATCH v1 0/7] RISC-V: kconfig.socs cleanup, part 1 Conor Dooley
2022-11-21 22:14 ` [PATCH v1 1/7] RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols Conor Dooley
2023-01-10 21:14   ` Geert Uytterhoeven
2023-01-10 21:39     ` Conor Dooley
2023-01-11  7:46       ` Geert Uytterhoeven
2023-01-10 22:22     ` Damien Le Moal
2023-01-10 22:34       ` Conor Dooley
2023-01-10 22:47         ` Damien Le Moal
2023-01-11  7:50           ` Geert Uytterhoeven
2022-11-21 22:14 ` [PATCH v1 2/7] RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN Conor Dooley
2022-11-21 22:14 ` [PATCH v1 3/7] RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO Conor Dooley
2022-11-22  6:04   ` Christoph Hellwig
2022-12-09  1:24     ` Palmer Dabbelt
2022-12-09  1:24       ` Palmer Dabbelt
2022-12-09  1:24       ` Palmer Dabbelt
2022-11-21 22:14 ` Conor Dooley [this message]
2022-11-21 22:14 ` [PATCH v1 5/7] RISC-V: stop selecting the PolarFire SoC clock driver Conor Dooley
2022-11-22  8:35   ` Geert Uytterhoeven
2022-11-22  8:40     ` Conor.Dooley
2022-11-21 22:14 ` [PATCH v1 6/7] RISC-V: stop selecting SiFive clock and serial drivers directly Conor Dooley
2022-11-21 22:14 ` [PATCH v1 7/7] RISC-V: stop directly selecting drivers for SOC_CANAAN Conor Dooley

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